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CCS/UCD3138A: DPWM module synchronize to external signal

Part Number: UCD3138A
Other Parts Discussed in Thread: TMS320F28027

Tool/software: Code Composer Studio

1. I configured DPWM0 to be synchronized to the external signal. But I found that if there is no external sync. signal, DPWM module will have no outputs. I need to give at least a pulse on the SYNC pin first, then I can get DPWM signals. Is there any thing wrong with my configuration? or the UCD3138A is designed to work that way?
2. In the SYNCCTRL register, I can choose either low or high level presents on the SYNC pin by configuring SYNC_IN. Does that mean the sync. signal is level triggered? Is there any requirement on the minimum width of the sync. pulse?
3. In my bench test, the delay time between external sync. signal goes high and DPWM0A sets is 50ns. Can the delay time be shorter? Below is my initialization code.
Dpwm0Regs.DPWMCTRL0.bit.PWM_EN = 0;     // disable DPWM0 locally during initilization
Dpwm0Regs.DPWMCTRL0.bit.CLA_EN = 0; // default is 1 (i.e. default is to use the filter output to control DPWM)
Dpwm0Regs.DPWMPRD.all = PERIOD;         // use .all for all values, so that the scaling matches
Dpwm0Regs.DPWMEV1.all = EVENT1;         // set EVENT 1 to 0% (start) of period
Dpwm0Regs.DPWMEV2.all = EVENT2;
Dpwm0Regs.DPWMCTRL1.bit.EXT_SYNC_EN = 1;  // also need to configure SYNCCTLR and IOMUX
Dpwm0Regs.DPWMCTRL0.bit.PWM_EN = 1;     // enable DPWM0 locally
LoopMuxRegs.GLBEN.bit.DPWM0_EN = 1;     // enable DPWM0 globally
LoopMuxRegs.SYNCCTRL.bit.SYNC_DIR = 1; // input pin
LoopMuxRegs.SYNCCTRL.bit.SYNC_IN = 1;  // logic level high
I have used TMS320F28027 before, and there is input qualification configuration. If I choose the input signal to be asychoronous input, the internal delay time will be shorter. Is there any register like that in UCD3138A?
Thank you in advance
  • The Sync signal is edge triggered, but it is also sampled. It is sampled at 250 MHz. So theoretically something like 12 ns should be enough, but I would suggest longer just because the edges may not be fast enough. Design has looked at the logic, and they expect something more like 20 ns. We're still looking at it.

    There is no option to make it asynchronous on the UCD.

    Sync always is triggered on the rising edge. If you look at SYNC_IN, it is a read only bit which gives you the current level on the SYNC pin. What is the timing from the rising edge on SYNC to the edge from the DPWM?
  • Hi Ian,

    Thank you for your quick reply!

    I use the scope to measure the time difference between SYNC rising edge and DPWM output rising edge.
    The SYNC signal comes from the waveform generator.