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UCD3138: Questions about SCFE_GAIN_FILTER_SEL for UCD3138

Part Number: UCD3138

Hello
I am learning the UCD3138 full-bridge hard switch development board firmware
I have some questions about void init_front_endx(void)
Void init_front_end0(void)
{FeCtrl0Regs.EADCCTRL.bit.SCFE_GAIN_FILTER_SEL = 1;}
Void init_front_end1(void)
{FeCtrl1Regs.EADCCTRL.bit.SCFE_GAIN_FILTER_SEL = 1;}
Void init_front_end1(void)
{FeCtrl2Regs.EADCCTRL.bit.SCFE_GAIN_FILTER_SEL = 0;}
I only know that SCFE_GAIN_FILTER_SEL is used to enable the Switched Cap Noise Filter, but I did not find out more about the Switched Cap Noise Filter in the manual.

I wonder what this Switched Cap Noise Filter is for?

Why is it enabled in the Vo and Io loops and disabled in the Vin loop?

Thank you

Regards

ZJYL

  • This bit has effect on how fast the analog signal is detected by EADC. For normal operation of closing the loop the default value of 1 is fine.
    Only if you want to make the EADC to get slightly faster you may set it to 0. But this will increase the sampling noise slightly.
    Setting of zero is recommended only if you use the digital comparator to detect some move fast.
  • Switched Cap Noise Filter is a small filter at the EADC input, help to filter out noise, therefore it is enabled for Vo and Lo loop. For Vin, there is no Vin loop, we use EADC2 to measure Vin for input voltage feedforward, we disable the filter for faster signal acquisition.

    Regards,
    Bosheng
  • I understand, that is to say,
    for Vo, Io we close the loop control, the emphasis is on accuracy rather than speed, so we must enable the Switched Cap Noise Filter to reduce noise interference.
    For Vin, we don't control it. The emphasis is on sampling speed rather than accuracy. So we forbid Switched Cap Noise Filter and Switch Cap Period divide by 2 to further increase the sampling speed, right?
    Then we can also set Vo and Io to Switch Cap Period divide by 2 , which not only guarantees the sampling accuracy, but also improves the conversion speed. Why didn't you do it?
  • I understand it, that is to say,
    for Vo, Io we close the loop control, the emphasis is on accuracy rather than speed, so we must enable the Switched Cap Noise Filter to reduce noise interference.
    For Vin, we don't control it. The emphasis is on sampling speed rather than accuracy. So we forbid Switched Cap Noise Filter and Switch Cap Period divide by 2 to further increase the sampling speed, right?
    Then we can also set Vo and Io to Switch Cap Period divide by 2 , which not only guarantees the sampling accuracy, but also improves the conversion speed. Why didn't you do it?
  • SCFE_CLK_DIV_2 is set by default; meaning it uses lower frequency.
    This lowers speed and accuracy is slightly improved (Not very noticeable).
    The filter bit has much more effect that this bit.

    You are right about the rest of it.