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Original question:

UCD3138: About Sync FET soft off

UCD3138: About Sync FET soft off

yuan.liding
Prodigy 100 points
Part Number: UCD3138

Hello，

In UCD3138 , I read the sinu28 about “Sync FET Soft On/Off using Ramp Module” in section 3.3.8. I wan to try it in my project, but I don't know how to configure the related registers.

Do you have some reference code or application note about this?

Regards.

  • 0
    TI__Mastermind 18370 points

    Please read the section "3.3.8 Sync FET Soft On/Off using Ramp Module" in theTechnical reference Manual.
    Please also note this is implemented slightly differently in UCD3138A.
    So, the following should not be used in conjuntion with a device of type A, such as UCD3138A.

    The following is an example of such configuration:

    void init_syncfet_soft_onoff(void)
    {
    LoopMuxRegs.DPWMMUX.bit.DPWM0_SYNC_FET_SEL = 2; // Front End 2 Ramp output drives DPWM0B SyncFET soft on/off
    LoopMuxRegs.DPWMMUX.bit.DPWM1_SYNC_FET_SEL = 2; // Front End 2 Ramp output drives DPWM1B SyncFET soft on/off
    Dpwm0Regs.DPWMCTRL1.bit.SYNC_FET_EN =1; //enable syncFET mode
    Dpwm1Regs.DPWMCTRL1.bit.SYNC_FET_EN =1; //enable syncFET mode
    FeCtrl2Regs.RAMPCYCLE.bit.SWITCH_CYC_PER_STEP = 1;//? Number of switching cycles pre DAC step
    FeCtrl2Regs.RAMPCTRL.bit.SYNC_FET_EN = 1; // Use the value SYNC_FET_RAMP_START for start
    FeCtrl2Regs.RAMPCTRL.bit.RAMP_EN = 1; //Ramp by Hradware
    FeCtrl2Regs.RAMPCTRL.bit.SYNC_FET_RAMP_START = 0; // default
    FeCtrl2Regs.RAMPDACEND.bit.RAMP_DAC_VALUE = PERIOD-20; //1100
    FeCtrl2Regs.DACSTEP.bit.DAC_STEP = 5;

    LoopMuxRegs.FECTRL2MUX.bit.DPWM1_FRAME_SYNC_EN = 1;//DPWM1 trigger FE2
    LoopMuxRegs.SAMPTRIGCTRL.bit.FE2_TRIG_DPWM1_EN = 1; //DPWM1 sample trigger to FE2

    FeCtrl2Regs.RAMPCTRL.bit.FIRMWARE_START =0;
    }


    after initialization, you can start the soft on by:

    FeCtrl2Regs.RAMPCTRL.bit.FIRMWARE_START = 1; //Initiate sync soft on

    and check if ended by:

    if(FeCtrl2Regs.RAMPSTAT.bit.RAMP_COMP_INT_STATUS == 1)//if sync complete on

    Hope this helps.

    Regards,

  • 0 in reply to Yitzhak Bolurian
    Prodigy 100 points
    Thanks for your reply,

    I'm in the use of the UCD3138A , so can you tell me the difference you mentioned?

    Regards.
  • 0 in reply to yuan.liding
    TI__Mastermind 18370 points
    Well, In UCD3138A the Sync Soft On hardware using the ramp mechanism will not work properly.
    So the Sync soft on needs to be handeled using software.
    For example since we already have a 100 micro-seconds periodic interrupt (Standard interrupt), you can increment or decrement the length of DPWMB by small steps in each 100 micro-seconds.
    This will need to be coarser or taking longer than what could be done by hardware soft on/off.
    That is because the hardware did apply small changes in each switching cycle and not every 100 micro-seconds.
    But besides this issue, it is feasible and we have done this before.
  • 0 in reply to Yitzhak Bolurian
    Prodigy 100 points

    I got it.

    Thank you very much.