I am in the middle of designing a power circuit for an FPGA based system. I am using the PTH04000 and the PTH05050W to derive the voltages for the core and I/o respectively. I am also using a tracking LDO TPS74301 for deriving a quiet analog rail. I need all these three rails to rise following the same ramp rate. Hence, i have tied the auto track pins of both the PTH`s together and have given it to the TPS74301 track input through a resistor divider network calculated to yeild simultaneous sequencing.
Has anybody attempted this kind of thing before , are there any gotcha`s that i must look out for ?
Is there any way for me to estimate the ramp rate of the entire system ? I looked around but could not find any kind of models for the PTH`s.
Any help would be greatly appreciated .
The internal AutoTrack (AT) RC is a 43.2KΩ resistor and a 1uF capacitor. Tying the AT pins of the power modules together will allow them to track up at the same rate. Adding a resistor divider to the AT node will affect the ramp rate. You may want to add the LDO Track resistor divider to the outputs of one of the modules.
Make sure to use a voltage supervisor to control AT and allow the required 20msec hold-off after a valid input voltage is present.
Thanks for the response. I am using a votlage supervisor to control AT for the 20msec hold off. But i want the LDO output to also rise at the same rate as my POLAs. I am operating both the LDO and my POLA`s off the same rail, and in order to sequence them simultaneously, i have tied the AT`s of the POLA`s with the track of the LDO through a resistor divider.
It is okay in my application if the ramp rate is changed because of the resistor divider as long as all these rails ramp simultaneously.
Is there a serious problem with this approach ? i cannot tie the LDO track to the output of the POLA module, because i want to power the POLA and the LDO from the same input rail. If i tie the track to the output of one of the modules, that would mean that the LDO is being powered by the POLA and not by the input to the POLA.
Please let me know if there is something that i am missing here!
Please see Fig. 29 of the TPS74301 datasheet. The LDO is powered from the 5V rail and the Track input is sensing the output voltage of another supply. This would be the best way to configure your LDO's Track signal. Otherwise the resistor divider off of the AT pins may limit the AT voltage.
I would suggest powering both modules and the LDO from the 5V rail. Tie both module's AT pins together and release them using a supervisor 20msec after a valid input voltage. Connect the LDO's Track resistors to the output of one of the modules. As the supervisor releases the AT pin, the outputs of all three devices will begin to rise together.
Thanks for the insights. Guess this should work ! Will let you know the results of the prototype.
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