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TPS65381-Q1 Register SAFETY_FUNC_CFG / Bit WD_RST_EN(D3)

Other Parts Discussed in Thread: TPS65381-Q1

Hello,

in the TPS65381-Q1 datasheet (SLVSBC4A Dec.2013) the PMIC register SAFETY_FUNC_CFG holds the bit WD_RST_EN [D3].

The  function for a cleared bit is:

0: Watchdog failure-event detection depends on the setting of the NO_WRST bi (bit D4)t in the SAFETY_CHECK_CTRL register.

But the NO_WRST/SAFETY_CHECK_CTR bit is gone (RSV now).

Could someone please state how the bit WD_RST_EN is supposed to work ?

Regards