I am planning to use UCC39002 for two DCDC modules parallel application, but some of content in the datasheet confused me. Please help to clarify it. Thanks.
1. On datasheet page9&22&25: about the Radj calculation. As I know most of DCDC module with a internal resistor(Rsense) between S+ and V+ pin. The calculated Radj is the value of external Radj and internal Rsense parallel? But the datasheet never mentioned the internal Rsense. Is it means we can ignore the internal resistor?
2. Page9 & 21: about the high-frequency pole (f_POLE), how to define it? Doubled crossover frequency? Or just use a symbolically a high frequency(say 50kHz, 100kHz)?