Are the complementary outputs of a typical comparator sufficient to avoid overshoot when connected to HI and LI, Or is a more elaborate scheme necessary to guarantee that both are not driven high at the same time?
Regards
Andy
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Are the complementary outputs of a typical comparator sufficient to avoid overshoot when connected to HI and LI, Or is a more elaborate scheme necessary to guarantee that both are not driven high at the same time?
Regards
Andy
Andy,
Thanks for inquiring about LMG5200. My recommendation is to design in the dead-time, whether via a logic circuit or in firmware if using a micro-controller that drives HI and LI independently. The dead time necessary to avoid a shoot-through condition will vary based on SW node slew rate and VIN bus voltage, so it is best to optimize this parameter on a case-by-case basis.
A sample dead-time generation circuit is shown in the user's guide for the LMG5200EVM-02 evaluation module.
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- Daniel