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LMG5200EVM-02: Operating problem of LMG5200EVM-02.

YARON VIRTZER
Prodigy 60 points
Part Number: LMG5200EVM-02
Other Parts Discussed in Thread: LMG5200

Hi

i try to operate the LMG5200EVM-02 but there is no output signal.

the output load is resistor of 47 Ohm.

On step 1 : I Connect a Supply to J3 Connector (6V).

On step 2 : I Connect a function generator output to the J5 connector (4MHZ, squre signal, 50%, 6Vp-p).

On step 3 : I  Connect a Supply to J1 Connector (30V). 

On step 4 : power up Supply to J3 Connector (6V). The D1 diode lights up after the driver bias supply comes up.

On step 5 : turn on the function generator which conected to the J5 connector .

On step 6 : Power up the input supply (30 V). The D2 diode lights up after the input supply is powered up.

when i checked the TP9 and TP10 I see the  input signal but there is no signal on output. 

Please advise.

Best Regards

Yaron

  • 0
    TI__Expert 4420 points
    Hi Yaron,
    thanks for contacting us.

    The power up sequence you have used is correct.

    I have a few questions and suggestions of things to try before I can fully help you:

    1.When you say that there is not output signal, are you measuring the switched node? Or just the output voltage?

    2. The input signals on TP9 and TP10 (Hi and LI), are they as expected? (i.e.complementary and with >2ns of dead time)

    3. You can check the integrity of the FETs by checking that they are high impedance form Vin to SW (high-side FET) and SW to GND (low-side FET), and checking the third quadrant drop by using a meter in diode mode (you should read ~1.4-1.7V from Source to Drain).

    4. If #3 is pointing to healthy FETs, I would advise you to try power up the circuit without load and verify that you have the same behavior.

    Please let me know the results so that I can assist you further.

    Best regards,
    Alberto
  • 0 in reply to Alberto Doronzo
    Prodigy 60 points

    .Hi Alberto

    Thanks for your answer.

    1. When you say that there is not output signal, are you measuring the switched node? Or just the output voltage?

    1. Answer: the output voltage is about 1 V DC.



    2. The input signals on TP9 and TP10 (Hi and LI), are they as expected? (i.e.complementary and with >2ns of dead time)

    2. Answer: the input signal are seems ok as expected.

    3. You can check the integrity of the FETs by checking that they are high impedance form Vin to SW (high-side FET) and SW to GND (low-side FET), and checking the third quadrant drop by using a meter in diode mode (you should read ~1.4-1.7V from Source to Drain).

    3. Answer: i will check it later, thanks.

    4. If #3 is pointing to healthy FETs, I would advise you to try power up the circuit without load and verify that you have the same behavior.

    4. Answer: Thanks I will check it.

    Best Regards

  • 0 in reply to YARON VIRTZER
    TI__Expert 4420 points

    Hi Yaron,

    thanks for checking points 1 and 2.  

    Since you are getting some voltage on the output I would check what the switched-node looks like, but do this after you have confirmed the good health of the FETs.

    At your convenience, please let me know what further results you acquire so that I can help you solving this unexpected behavior.

    Thank you and best regards,

    Alberto

  • 0 in reply to Alberto Doronzo
    Prodigy 60 points

    Hi Alberto.

    Thanks for your answer. I check and I have more information.

    1. When you say that there is not output signal, are you measuring the switched node? Or just the output voltage?

    1. Answer: the output voltage on J2 is a bout 3.3 V DC.

     2. The input signals on TP9 and TP10 (Hi and LI), are they as expected? (i.e.complementary and with >2ns of dead time)

    2. Answer: the input signal are seems ok as expected.

     3. You can check the integrity of the FETs by checking that they are high impedance form Vin to SW (high-side FET) and SW to GND (low-side FET), and checking the third quadrant drop by using a meter in diode mode (you should read ~1.4-1.7V from Source to Drain).

    3. Answer: 
    The impedance form Vin to SW (high-side FET) is ~700Kohm.
    The impedance form SW to GND (low-side FET) is ~240Kohm.
    I am not sure what you mean regarding to third quadrant drop .. the J2 output connect to load.


     4. If #3 is pointing to healthy FETs, I would advise you to try power up the circuit without load and verify that you have the same behavior.

    4. Answer: I tested power up the circuit without load ,however, same resaults- no signal on output (just 3.3DC).
    J1 connector Vin= 27V; Iin= 0.01A.
    J2 connector = 3.3V DC.
    J3 connector = 6.2V DC, Iin= 0.21A.
    Signal generator= 6Vp-p ; 4MHz.

    Maybe I Have problem with the board..?

    Please advise

    Best Regards
    Yaron

  • 0 in reply to YARON VIRTZER
    TI__Expert 4420 points
    Hi Yaron,

    You checked the high impedance of the FET when off and that looks good.

    But you also want to ensure that the FET is not open.

    There are a couple of ways to ensure this is not the case:

    1. Set the multi-meter in diode mode, put the positive lead on SW and the negative on Vin, the reading should be 1-2V. Then you can repeat with the positive on GND and the negative on SW.

    2.Apply VDD and set both HI and LI to a value above 3V, then with a multimeter measure the resistance of the FETs (note don't apply Vin!).

    Also when you say you are driving the input signal with a 6Vpp, what is your bias at?

    Best regards,
    Alberto
  • 0 in reply to Alberto Doronzo
    Prodigy 60 points

    Hi Alberto

    I will check it next week. thank you.

    regarding to the diode it is ok 1-2V.

    Best Regards

    Yaron

  • 0 in reply to Alberto Doronzo
    Prodigy 60 points
    Hi Alberto

    1. Set the multi-meter in diode mode, put the positive lead on SW and the negative on Vin, the reading should be 1-2V. Then you can repeat with the positive on GND and the negative on SW.
    Answer: regarding to the diode it is ok 1-2V.

    2.Apply VDD and set both HI and LI to a value above 3V, then with a multimeter measure the resistance of the FETs (note don't apply Vin!).
    Answer: the resistance between SW to HS is ~100Kohm and between SW to HB is 0 ohm.

    Also when you say you are driving the input signal with a 6Vpp, what is your bias at?
    Answer: between 1 to 2 VDC

    There is no signal on output (just 3.3DC).

    Please advise
    Best Regards
  • 0 in reply to YARON VIRTZER
    TI__Expert 4420 points
    Hi Yaron,
    I would have expected the resistance of both FETs to be 0ohm when turned on. But if you are saying that from SW to GND the impedance is >100k while the body diode is between 1-2V when off, it looks like the low side FET is not damaged but it is not being driven.

    This would cause the high side supply (HB) to remain discharged, and neither of the FETs would be operating.

    Your input being at 6Vpp with a bias of 1-2V you would get a signal going from -2V to 5V. The Abs Max is -0.2V and that might have damaged the part.

    My suggestion would be to substitute the LMG5200 with a new one, and ensure that the driving voltages do not exceed the limits stated in the datasheet.

    Best regards,
    Alberto
  • 0 in reply to Alberto Doronzo
    Prodigy 60 points

    Hi Alberto

    I replace the LMG5200 with new one and now it works OK!.

    I would like to know why the LMG5200 SW output pin connect via L1 to J2 connector. The L1 is use as low pass filter (mean I see only DC after the inductor).

    Best Regards

  • 0 in reply to YARON VIRTZER
    TI__Expert 4420 points

    Hi Yaron, 

    I am happy to hear that your board is working well now!

    Regarding your question, this board is configured as a buck (or boost, if you run it in reverse) power stage, so it is configured to have DC voltage on both of the power terminals.

    The inductor L1 is connected to the switched node, to -as you mentioned- provide the inductance in the low pass filter to obtain DC from a Switched waveform.

    I hope this answers your question!

    Best regards,

    Alberto