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LMG5200: Conduction losses in 3rd quadrand operation

beat Ronner
Intellectual 405 points
Part Number: LMG5200

Hello

How are the conduction losses calculated for negative currents?

Is it

Pcond=Id^2*Rds,on as indicated in the loss calculation chapter

or is it

Pcondd=Id*(Id*Rds,on + Vsd), with Vsd=3rd Quadrant conduction drop as indicated in the datasheet, and also as shown in Figure 3 (3rd Quadrant conduction)

With Vsd=2V, the losses would get huge!

Is there an anti-parallel Diode, or is this not needed for a GaN-Element? If there is one, what is the Forward voltage vs. IDs characteristic?

With this quite big Vsd, what do users typically do to reduce on-state-losses? Mount an anti-parallel diode external of the package? But then, the whole benefit of an integrated solution goes lost!

Regards

Beat

  • 0
    TI__Expert 4420 points

    Hi Beat,

    thanks for the follow up question about the 3rd quadrant loss calculation.

    To obtain the instantaneous power loss during a 3rd quadrant conduction event, you can refer for figure 3 of the datasheet:

    At a known given current you can extrapolate the voltage and calculate the instantaneous power as Pdt_inst= V*I .

    The average power of this event has to be multiplied by the duration (which is effectively the dead-time) and the switching frequency, giving you :

    Pdt=V*I *tdt*Fsw

    If you intend to maximize efficiency, you should aim to maintain the dead-time below 5ns (the range we typically use is 2-4ns).

    In case you cannot trim the dead time, your worst case contained by the part is the maximum HO to LO mismatch which is 8ns (this is safe under all conditions), typical 2ns.

    Please let me know if this addresses your question!

    Thank you.

    Best regards,

    Alberto

  • 0 in reply to Alberto Doronzo
    Intellectual 405 points
    Hello Alberto

    Thanks for your Patience!
    So does this mean 3rd Quadrant conduction applies only during dead-time, i.e. if none of the FETs is switched on?
    And what is the conduction model for negative current during the time the FET is switched on? Is it then the same Rds,on as for positive current?
    i.e. uds=Rds,on *ids

    Regards
    Beat
  • 0 in reply to beat Ronner
    TI__Expert 4420 points

    Hi Beat,

    no problem at all!

    Your understanding is correct.

    The "3rd quadrant conduction" applies only when you are conducting current from source-to-drain while the FET is off (i.e. during the dead-time).

    If the FET is on, the Rdson is symmetrical with respect to the current, yielding (as you wrote) Vds=Rdson*Ids for both positive and negative directions.

    Please let me know if you have any further questions!

    Best regards,

    Alberto