PR779/PR780 was a reference design that systems engineering used to evaluate the UCC28070. There is a 300W EVM that you can order and evaluate http://www.ti.com/litv/pdf/sluu312b. It also has a proven layout where you can download the Gerber files if you like. http://www.ti.com/litv/zip/sluc111 http://www.ti.com/litv/zip/sluc110
If phase A is working and phase B will cause the FET to fail. It could be something wrong with phase B's current sensing network. The current amplifier feedback might not be seeing a current sense signal. If that is the case the peak current limit for that FET would not work also. This would cause the FET to blow up. Note this is only one scenery to what could be causing the FET to fail.
You might try evaluating your design by limiting the input current of your AC source so the fuse does not blow. In this way you can evaluate the current sense signals to make sure everything is O.K.
Mike,
I thought I would post a follow up on our continued testing. We were able to get phase A working well with a new set of calculated values, however we are still trying to figure out what is wrong with phase B. With only Phase A enabled we are able to regulate to the desired voltage and took the opportunity to take some measurements. While the current sense signal did a great job of mimicking the AC wave form, we noticed that our meter was showing a PF of .54. After using our oscilloscope to monitor input Voltage and current sense we noticed that there was a phase shift between Current and Voltage. We did this testing at a fairly light load, is the result of this test due to the light load or maybe the fact that only one phase is enabled?
We look forward to hearing your thoughts on Phase B, and our questions concerning Power Factor.
The definition of power factor is real input power divided by RMS output power. At lighter loads there will be a phase shift between input current and input voltage. This will drive down the power factor. It should not matter if you have one phase or two for a given power level.
We were able to find the problem with phase B. The Gate drive signals from the UCC28070 were running under one of the high current traces on phase B. We filtered that line and after that we have been able to run with both phases.
While attempting to get both phases working we had calculated values that would result in peak current limit at a very small output level. Now that both phases are running we changed our values back to our intended values. After the switch we noticed that there is no longer a phase shift between current and voltage. However we did notice that the input current is no longer sinusoidal at any load. We were wondering if any of the following changes adversely effect power factor.
Going to two Phases.
Peak current limit was raised to 3.75V.
Switching frequency went from 125kHz to 60kHz.
Termination values for the current sense transformers were changed.
Voltage compensation network VAO was chagned.
Both Current compensation networks were changed COA and COB.
Imo resistance was changed.
We noticed that the 3.18 volt over voltage protection limit was being reached on our Vsense pin. We increased the capacitor on that filter in order to filter unwanted noise, however our filter RC constant is much longer than recommended in the Data sheet. We used a 3300pF capacitor and a 1.1megaohm resistor making for a time constant of 3.63 milliseconds, compared to the recommended 100 microseconds.
Look at the voltage across your IMO resistor. It needs to be a rectified sine wave. If it is not more than likely you have too much filtering at the VINAC pin. It might be worthwhile for you to order one of the 300W EVM to evaluate. You can look different points and compare them to your design. Points of interest to you might studying the Rimo CSA/B outputs and the voltage amplifier output.
By heavily filtering Vsense you might be masking another problem. You might have too much output ripple voltage and that is what is triggering the over voltage protection.
Answers to your questions below
Going to two phases
>If the load is the same PF for one or two phases should be very similar.
>Using a larger current sense signal will reduce crossover distortion caused by current amplifier offsets. This will lower THD. This could improve power factor.
>Switching frequency should not have an effect on power factor. However, the inductance needs to be designed for the specific frequency in question.
Voltage compensation network VAO was changed.
>This does have an impact on PF and THD. If the 100/120Hz ripple is not attenuated this can result in third harmonic distortion which will lower power factor and increase THD. Generaly the voltage loop should cross over at 10 to 20 Hz. The voltage amplifier 100/120Hz ripple should be less than 50mV.
>If the current loop is not stable the CS signals will not track the voltage at IMO.
Thank you this post was very helpful, I will check our board based on your advise.
We have made a lot of progress on this board, we are now trying to improve our power factor over the output range. We are happy with the power factor at full load, and we understand that power factor will fall off as load decreases. We were wondering if you had any tips to slow down the power factor roll off.
Also in a previous post we discussed the phase shift between current and voltage at light loads. Is this phase shift caused by the input capacitance(2.2uf film capacitors) becoming a higher and higher percentage of the load? Do you have any tips for reducing the magnitude of the phase shift?
Thanks for all of your help.
MikeO Look at the voltage across your IMO resistor. It needs to be a rectified sine wave. If it is not more than likely you have too much filtering at the VINAC pin. It might be worthwhile for you to order one of the 300W EVM to evaluate. You can look different points and compare them to your design. Points of interest to you might studying the Rimo CSA/B outputs and the voltage amplifier output.
Hi Mike,
What's the best method to measure across RIMO? It's very sensitive. Attaching a probe makes the supply chirp and make other funny noises. While it doesn't get damaged, the supply is unable to start.
Sir,
The problems stated above are same to mine too, i.e. I have blown a FET and the fuse too. In the above discussions you have mentioned, that the problem was solved, but not how it was solved. Kindly provide the details as to what were the changes you made after the FET blowing in Phase B started till you got both phases working and till achieving desired 0.9 p.f. I am building a bridgeless converter as given in SLUA517, but at reduced switching frequency. The above fault occurred at no-load. Please provide me a solution ASAP. Thank you.