I am looking at the UCC2801; however, my questions also apply to many other similar PWM controllers.
Does the VCC pin need to be powered through a current limiting resistor? Please explain. In addition, can someone provide a simple application circuit demonstrating how the VCC pin should be connected in a circuit?
Would be figure below be sufficient for this device? VPRI may vary from 10V to 30V. How should the values of these components be chosen?
Please explain the functionality and application of the COMP and FB pins. Again, schematics would be appreciated in addition to explanations.
Also, please describe how to choose an appropriate current sense resistance.
The series resistor can be referred tpo as a "smoothing" resistor. It smooths out the voltage spike that is caused by the leakage inductance. Without this resistor, the bulk capacitor on VCC would peak charge and the VDD voltage would exceed the ABSOLUTE MAXIMUM rating. Thou shalt NEVER exceed the Abs Max rating on any device (TI's or any one else's). There are a vairety of ways to supply VCC; and basically you need a start up that will supply the maximum specified start up current until the minimum specified under voltage lockout turn on threshold is reached so that the steady state bias windings can be activated and supply the operating current (which includes the controller's operating current and the gate drive current). The circuit of choice is dependent upon the input voltage range. A wide input range usually uses start up resistors and bias windings, a narrow range could be a constant current source like that shown in U-165.
COMP and FB function to maintain stable operation and component selection is based upon the specific controller. Basic feedback loop design is an entire college course and I would refer you to books written by Pressman, Marty Brown, or Keith Billings. Also, Lloyd Dixon has a Control Loop Cookbook from Seminar 1100 that you can find on the TI website.
The current sense resistor is selected to trigger the over current threshold in a peak current mode controlled converter. I usually select it so that at 10% higher than my peak primayry current during normal operation.
The leakage inductance causes a spike on the MOSFET drain, not the rail voltage of a Flyback converter. I do not see how a smoothing resistor is required...
For my application, the primary voltage range is 10-30V. I was planning on using a separate logic supply voltage (possibly 10V) to power this device. If you have a better idea, I am open to suggestions.
I will investigate the COMP and FB further.
Another question: What is a good way to enable/disable the output of this chip (without removing the rail voltage)?
The leakage inductance spike will be coupled onto the bias windings as well, assuming the VDD is supplied by auxiliary windings. I have personal experiance of the destructive force of a voltage spike on VDD. I have never personally used a seperate logic supply for my bias voltage but if you do I would suggest that it meet the maximum 10.2 V UVLO start threshold that is specified in the UCC2801 data sheet. Granted, a nice regulated logic supply will not have the leakage spike on the bias voltage.
As stated in the data sheet, you can force a zero duty cycle by externally forcing the COMP pin to GND. This will disable the output drive until COMP is released.
You mention bias windings and auxiliary windings. Are these the same?
There are no auxiliary windings available in my circuit. Do you see an issue with powering the VCC pin 7 with a regulated supply that meets the maximum UVLO? For example a 10V±1V rail to power the UCC2800, or an 11V±0.5V rail to power the UCC2801.
Thank you for pointing that out (regarding the COMP pin to GND). If the FB pin is externally forced high (4V-5V), would this also force a zero duty cycle? (A 'yes' or 'no' is sufficient. I still need to investigate the feedback loop design.)
If I desire additional adjustability on the current sense resistor, what are my options? Can this be adjusted using the COMP and FB pins or should this be adjusted as an input to the CS pin? See the figure below. R1 is the current sense resistor. R2 and R3 allow for a voltage adjustment at the current sense pin. R2>>R1 and R3>>R1.
I do not see an issue using a regulated supply for VDD.
Consider that the COMP pin was designed with the specific feature of disabling the controller by pulling it low. Pulling FB high would probably work as well although the ABS MAX rating is 6.3V; hitting this level or going beyond it may result in damage, reverse bias conditions, etc. It is always best to use the intended feature that is designed into a device (there will be no data to support pulling FB high for an extended amount of time). So the short answer would be "no, use the disable feature of COMP"
Yes you can tune in the CS resistor with the thevenin equivalent that you show. I have done this myself.
Does the same hold true for the UCC28C4X product line? (Regarding your previous response.)
Yes on VDD from regulated supply, yes on CS resistor thevenin equivalent, and yes, the COMP pin can be pulled low to disable the output
We have problems when we move our controller from ucc2845 to ucc 2801, all the peripheral components are modified according to Ti's docoment. However, the
ucc2801 sometimes losts the output, red circle indicates that there should exist pwm pulse.
the blue wave form is Vgs, PWM output of ucc2801. where as the cyan waveform is Vds. Input voltage is 200VAC@50Hz, this topology is single stage flyback pfc. would you mind tell us what had happened with the circuit? (The old version is normal, PWM controller is ucc2845).
BTW, the Transformer is working in DCM mode. Totol power output would be 10W, secondary output is 5V/1A and 12V/0.3A.
Please send a complete schematic.
secondary side are three regular rectifier and capacitor filter structure with a small rc filter on the diode. C69. D8 and R26 are soft switch compensation and not used currently. R7. C39 D2 (TVS diode) are spike absorb network and not used currently.
Thanks very much for your quick response.
You have 94uF (C50+C51) shunted to ground by 25kohms (R15+R21) This means that any signal coming into the resistor/capacitor will start to roll off at frequencies greater than 0.067 Hz .This is way to slow.
The error amp inside the IC has a gain of 7.5 out ot about 8 kHz at which point it starts to fall off but because of the roll off of the previous network it will still be way to slow.
You need to look at the load impedance and rework your feedback loop.
Go to http://www.bodospower.com/current.aspx and get signed in to read the article on pages 74 to 79 on "How to Design a Discontinuous Flyback Converter"
Once you have done that and corrected your loop you should eb getting better results.
If you don't please send the complete schematic (Input, OUTPUTS, Inductor values turns ratios etc.) and I will see what I can do to help.
We've solved this problem by two ways:
1. According to your suggestion, we adjust the C50 and C51 to 10uF, and R15+R21 to 10Kohms to expand the overall bandwidth of the feedback system.
2. Moves the MOSFET heatsink 20 mm away from the transform primary winding input pin.
Now the waveform looks much better than before.
Now , the +12V output is very stable, however, we want to minimize the EMI noise to 10mV level. Would you give us some suggestions on this ?
Following is the switching noise wave form. We already used three cascaded passive LC filter with common mode inductor. We also tried to add bead on MOSFET D pin, on Transformer, on secondary rectifier , on output line. However, the high frequency noise(about 15MHz to 50MHz) cann't be eliminated obviously.
the spike is expanded as follow:
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