I have an intractable problem with the UCC28019AD
My application is a 200W PFC circuit. 156V to 264V, 50Hz. 208W max output. Vht 390V. HTcap = 168uF. Lpfc=1.6mH
I used the design tool spreadsheet and applied the values suggested. Rshunt = 0.22R, Rsense = 220R, C (isense)= 1.15nF, C (Icomp) = 780pF.
The spreadsheet produces a V comp of 3.48V, to get the correct value of M1*M2 of 0.163 and that's what I see. At 200W, I see an Icomp peaking through 6V and I see missing and severely shortened gate drive pulses, exactly as a poster in another forum reports. The thing is, the problem is worse at higher input voltages when the current sense signal is a lower amplitude, and it all but disappears at 198V.
I've tried everything: extra filtering on I sense, more capacitance on Icomp, slowing the gate drive, deriving the aux from a bench supply, re-routing the power tracks, changing the IC.
I've come to the conclusion that the problem is due to the fact that Icomp actually is used as the OFF time pulse width modulator reference. The amplitude of Icomp is determined by the need to have Doff=Vin/Vout, so it's almost load insensitive, the feedback action operates to keep this signal looking much the same whatever the load. What does happen is that the amount of ripple on Icomp varies and if it ripples up past the point where Doff = 100% then you miss a pulse. Once that happens, there is an incestuous positive feedback and it just bursts into oscillation. It becomes better at lower input voltage because peak Icomp level is lowered and although the Isense signal is higher, feedback operates to keep Icomp away from the 100% level.
As I see it, the solution would be to use a higher Vht value and a higher value inductor, neither of which is possible in this case.
I should check schematic, the waveforms of the main signals and, possibly, the layout to be more concrete.
Could you even provide the filled-in XLS file you used for the design?
even better, if you contact me at the customer support center I could better address the topic
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