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When I used the UCC28070 in a design I did have issues with a noisy inductor. This was because there was too much intertwining capacitance. It was suggested that I use a progressive winding approach to reduce the capacitance. When I did this it reduced the ringing by a factor of 2.
Hello
Can you please provide me with some useful informations or some tips about design?
I'll explain my (and my colleague) problems a bit deeper. We are working on two different projects both involving UCC28070, I'm working on power supply with PFC, power is (as explained in my first post) 400W, etc..., and my colleague is working on 1600 W PFC for power motor control board. We have two different PCB designs and of course different calculated external passive components for UCC28070. Also current transformers are different, power FET's, all according to required power output. But foundations of design are same based on TI reference design for 300 W PFC (we also try 1200 W reference design). We both use 130 kHz as switching frequency.
We both encountered same kind of problems:
- with calculated passive components (using TI's excel tool), PFC either don't function at all, or (after some tweeaking of elements Rsynth, Imo) it starts working but inductor became very noisy, PFC operation switches from continuously to discontinuously mode every few gate pulses (gate pulses are missing) when it should be permanently in continuously mode.
- we use diferent kind of inductor core (iron core gaped, spread gap, ... ) and winding no improvement at all.
- we also try to change inductor value but couldnt reach satisfying operation.
- when PFC is operating PF factor is low, and when we lower input voltage output voltage also significantly drops, same happens during load changes, and when we are near lower margin (120V) of operation it stops.
When I change my design to exact values as in reference 300W design (200kHz, 300W,...), I get some better results, noise is lower, when PFC gets into continuous mode it stays there (only part of period of course). But on the other hand PF is still low, transitions to continuous mode are sharp, and output voltage drop is still high when input voltage drops (350 V at 180V input). And at lower loads (150 W for example - 50% of nominal) everything get's even worse.
I'm now for almost three months (my coleague even longer) in the design but can't get any progress at all. We couldn't find out what we are doing wrong. I simply don't belive that this circuit can be so tricky or design dependand, I belive it should be (and is) as simple as puting a step-up switching supply together.
I understand that you are TI employee so can you please help us with a solution to any of our problems or forward this mail to someone it can, What are yours experiences with this ic. I already try to get help from design support a month ago, but I didn't get any answer at all. I search web for any informations from designer who already used this ic but couldn't find any.
Best regards
Ciril Mocnik
Mike O'Loughlin said:When I used the UCC28070 in a design I did have issues with a noisy inductor. This was because there was too much intertwining capacitance. It was suggested that I use a progressive winding approach to reduce the capacitance. When I did this it reduced the ringing by a factor of 2.
Hello Cirill,
The problems that you are having are not common issues that I have seen with designers using the UCC28070. Most designers have been able to get reasonable results even with a noisy inductor.
I did have some issues when the inductor current went discontinues. The inductor would ring with parasitic capacitance at the switch node and current would ring through the body diode causing a false current sense signal at the CS pins and distort the input current. This was removed by adding a PWM ramp and offset to the CS signal. This is explained on page 7 and 8 of the application note, which can be reached at the following link. http://focus.ti.com/lit/an/slua479/slua479.pdf
I am sorry that you did not get help from TI technical support. I will forward this correspondence to the TI product information center so they can help you with any issues that you are having. http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm Could you forward your email so I can send it to the appropriate person?
Regards,
Mike
Hello Marko,
Changing the AWG on your boost inductor should have no effect on UCC28070 performance. When I had issues with magnetic noise, I used the progressive the winding technique and it resolved issues I was having. Something must have changed in your magnetic design that is causing the circuit to misbehave.
Dear Mike, I am trying to build a 4.5 kw battery charger using 3 units of 1.5kw in parallel. The application is a 400volts battery charger . The input is 3 phase 3 wire without the neutral. the voltage range is from 100v p-p to 260v p-p ( freq from 25 to 60 hz ). since it isa battery charger appn , I shall be sensing the output dc current to keep all 3 units in equal current sharing. This control of dc current , can i use in parrallel to the output voltage sense signal ? . Also will the quantized voltage feed forward create problems in the functioning since it senses zero crossing and there shall be no zero crossing in my case.
Also the condition of unity pf is not very critical demand from the customer ,Also no isolation is required. All he wants is that the unit should charge the battery when the generator / turbine is developing low speed.
Can ucc28070 be used for this application ?.
Hello Rhat,
The multiplier used in the UCC28070 needs to see a zero crossing. It has to do with how the internal voltage feed forward works. I would not recommend using the UCC28070 if zero voltage is not present.
Regards,
MO
Dear Mike,
Would you please suggest some alternative product of texas for my application. I don,t have any
hands on experience on 3phase type pfcs( vienna rectifiier) . The customer is not hard and fast
about about unity power factor. He only wants a non isolated boost converter type battery charger
with constant current charging. ( pfc would have always been prefferable).
rgds,Rehat
Dear all,
We would like to model the functioning of the UCC28070 under simulink (simscape etc..). Are you able to provide under simulink a model of the UCC28070( algorithm (Current & voltage loop) etc..).
Best regards
Laurent Balzano
Hello Laurent,
I do not believe that TI has developed simulink models for our PWM's. However, I do know they have Spice models for some of our controllers. The list of models can be found at the following link. However, I did look at the list and there was not one available for this device. I believe there is also a link that you could request a spice model from the software team at this link as well.
http://focus.ti.com/adc/docs/midlevel.tsp?contentId=31690
Regards,
Mike
Thanks Mike for your response.
I don't need specifically the matlab model. I can build this one from equations or others materials. But still I need to understand how the current and the Voltage are physically controlled to reproduce it on a matlab model.
Best regards
Laurent
Hello Laurent,
The data sheet and application note should be able to tell you how the IC controls the voltage and current.
You can find this information in the UCC28070 TI product folder on the web.
Regards,
Mike
Hi,
Is there any option or a way exists by which we can make 4 phase interleaved PFC using 2 UCC28070 ICs? or by combining 2 two phse modules.
If not possible, can we parallell 2kW modules to make one bigger power.?
Actually we are developing a 5KW continuous rating PFC for high power amplifiers and already making 4 phase multikilowatt SMPS, same we thought for Interleaving PFC.
Hello Kanwar,
The UCC28070 can be synchronized using the CDR pin. Syncing two UCC28070 should be possible by have the two devices synchronized 180 degrees out of phase. The UCC28070 explains how to use the CDR to synchronize the device.
Regards,
Mike
Dear ciril mocnik,
am designing 2KW interleaved PFC. I/P:85 to 265VAC O/P:390V / 2KW and freq i selected 100kHz. pin1 i have connected to Vref, pin2 to GND, it is to disable the frequence diethring. i have used TI design tool and couldn't find any gate pulse. atlast i have used MOSFET driver ic (UCC27322) and MOSFET (650V/47A). Finally i got the output 385V @NL. At 200VAC, i have loaded upto 2.5A at output, its working fine & no input current oscillation. But at lower side (<150v). at 100VAC, i have loaded more than 1A, immediately input current start oscillation and sometime Fuse blown, MOSFET also fails. i couldn't identify the problem. kindly can you suggest or help me out in this issues.
thanks
Suresh
Dear Kanwar,
am designing 2KW interleaved PFC. I/P:85 to 265VAC O/P:390V / 2KW and freq i selected 100kHz. pin1 i have connected to Vref, pin2 to GND, it is to disable the frequence diethring. i have used TI design tool and couldn't find any gate pulse. atlast i have used MOSFET driver ic (UCC27322) and MOSFET (650V/47A). Finally i got the output 385V @NL. At 200VAC, i have loaded upto 2.5A at output, its working fine & no input current oscillation. But at lower side (<150v). at 100VAC, i have loaded more than 1A, immediately input current start oscillation and sometime Fuse blown, MOSFET also fails. i couldn't identify the problem. kindly can you suggest or help me out in this issues.
thanks
Suresh
Hi Ciril Mocnik,
thanks for the valuable information. now am testing in bare PCB only. later i have to do PCB design. as per your view, it may be also the reason due to improper grounding & short connection.
let me concentrate on this.
one more project, am doing, i want to deisgn isolated Full bridge PFC for 600W application. i thought of choosing UCC3895 ic. have to had any experience before in this isolated PFC. if so please share with me.
The UCC28070 full load can generally be designed for a THD of less than 12%. This is because of using CTs and requiring to add offsets and PWM ramps to the CS signals to prevent discontinuous current from distorting the input current. This causes a flat spot during crossover that slightly lowers THD. However, to meet EN61000-3-2 harmonic requirements can be accomplished with a THD of 28%. Not sure why you have to achieve a THD of less than 5%.
Hello Mike,
Thanks for the quick reply. After your reply, I have tested the parts corresponding to current sense section, however when I look ed at the results I could not achieve a good thd (best was around 21%). As you suggested, I have modified current loop (pole zero config of CS pins and Rsynth), but still I doubt about if current synthesizer is working well. What I did is as follows:
1. To eliminate flat spots at zero crossings, I increased voltage amplifier output pole capacitor. It gave remarkable results. Also, giving offset to Vin AC pin (1Mohm from VREF) slightly reduced flat spots.
2. To follow input voltage at peak points, I have increased multiplier output (IMO) resistance. At the peak points of input voltage, input current started to follow it and improved thd further.
3. To eliminate current jumps around 60 degrees of input current wave, I tried to change current amplifier passive elements (pole and zero insertion network especially), however I could not get any improvements. This is the point where I want to learn more about current synthesizer.
Could you please give some information about current synthesizer? All I got from datasheet was, Vin feedforward and Vout feedback are connected to a difference amplifier inside the synthesizer. What if I could manually disable synthesizer (pulling up Rsynth) and create down slope externally? In this case, would really cs signals be directly connected to the PWM comparator or still processed inside the synthesizer? How does current synthesizer actually create down slope?
What might be the best strategy to improve thd?
The flat spots are caused by offsets and the duty cycle clamp.
>Try using more inductance so you do not require as much offset and PWM ramp on the CS signals. (Covered in Page 8 of the UCC28070 Application Note)http://focus.ti.com/analog/docs/litabsmultiplefilelist.tsp?literatureNumber=slua479b&docCategoryId=1&familyId=406
I suggest you design the inductors for 50% ripple at 50% duty cycle. This should be when the input voltage is at half the output voltage. This also should allow the converters inductor current to be continuouse at high line down to 50% load.
>The application note not has good section on copensating the voltage loop and current loop.
>Current syntheses is just a cap that is peak charged with the current sense signal and discharged by a current sink that is programed by Rsynth. The application note alos covers how to set this up.
>You might try using the excel design tool. They are the same equations that are in the application note. You can find it in the UCC28070 product folder on TI's web sight. It uses the same equations that are in the application note. You will just have to enter in the inductance you calculate. It will be bigger than what the tool calculates.
Regards,
Mike
hi i am designing 3.3kw pfc using ucc28070 but i am facing a problem as i turn off 230v AC ucc28070 it start to generate gate pulses but as i turned ac 230v it stop working.i also have a problem that first it was generating 450v at out put according to my requirement but when i put load voltage drops to 300v .and now it is not giving 450v out it only give 310v out do u have any idea what problem it could be. Best Regards Muhammad Farhan Alam
hi mike
we have been working with the PFC using 3.3 kw it is performing the function but the out put voltage starts to decrease as we put load and then never recovers .we are not sure about the current sense signals at CSB and CSA pins how the wave form should be .i have attached the picture in which yellow is the wave form at current transformer and blue is the curve at CSB pin but its looks that nothing is on CSB can any one explain that how the signal should be on CSB and CSA
Best Regards
Muhammad Farhan Alam
Hello Muhammad,
Your signal out of the CT looks to be around 800mV with lots of ringing on it. Is this ringing real you might retake this using a tip and barrel method. You also might want to put a common mode choke on the scope probe wire.
You also do not have enough resolution on the CSA/B to see a CS signal. Try setting the blue trace to 200 mV per division. You might be able to see the CSA/B signal.
There is also a web orderable EVM that you may want to get a hold of an evaluate. It will show you what these signals should look like when the supply is properly working. http://focus.ti.com/docs/toolsw/folders/print/ucc28070evm.html
It almost sounds like the multiplier is not setup correctly. When you apply load the output voltage is dropping. Look at the VAO pin is this is locked high you know this is the case. Check the multiplier and RSA/RSB selections. There is an application note the goes through how to setup the multiplier and CSA/B current sense resistors. http://focus.ti.com/analog/docs/litabsmultiplefilelist.tsp?literatureNumber=slua479b&docCategoryId=1&familyId=406 There is also an exel design tool under tools & software for the UCC28070 which you can find at the following link. http://focus.ti.com/docs/prod/folders/print/ucc28070.html This goes through the same calculations as the the application note.
Also note that you need to setup the multiplier as if it were for universal application (85 to 265V) or it will not work properly.
Regards,
Mike
hi
mike
thanks for you detail answer i have improved some values in my design and now the signal at CSA/B looks like this as following
i think now this looks ok do you think its ok or not .
but i do have one more problem that when i start the pfc and keep conating the load at the out put the out put voltage does not reach 450v the circuit does genrate gate pullses which are about 1us of pulse width .but when i disconnect the load then it goes to 450v and then when the voltage is stable then i put the load at that time then the pfc works fine and voltage remain constant .does it has to do with the switching of the mosfets becuse i have noticed that some problem in switching the high gate charge mosfet .i am using a good gate driver which ucc37322 9amp driver.
bellow is the figure of input line current when load is 400w and the voltage is about 460v
the big peaks shown in figure are at zero crossing of the ac line voltage
best regards
Muhammad Farhan Alam
hi
mike
thanks for you detail answer i have improved some values in my design and now the signal at CSA/B looks like this as following
i think now this looks ok do you think its ok or not .
but i do have one more problem that when i start the pfc and keep connecting the load at the out put the out put voltage does not reach 450v the circuit does generate gate pulses which are about 1us of pulse width .but when i disconnect the load then it goes to 450v and then when the voltage is stable then i put the load at that time then the pfc works fine and voltage remain constant .does it has to do with the switching of the mosfets because i have noticed that some problem in switching the high gate charge mosfet .i am using a good gate driver which ucc37322 9amp driver.
bellow is the figure of input line current when load is 400w and the voltage is about 460v
the big peaks shown in figure are at zero crossing of the ac line voltage
best regards
Muhammad Farhan Alam
Hello Farhan,
The CS signal waveforms look much better and I am glad that you resolved the previouse issue.
What kind of load are you using to evaluate the PFC stage? If you are using constant current or constant power the unit might be going into peak current/power limit. This is not a realistic load for a PFC pre-regulator. In general there is circuitry to keep the downstream converter off until the PFC voltage is within regulation.
If you are using a constant current or constant power load try switching to constant resistance and see if the PFC pre-regulator will come up under load.
Regards,
Mike
hi mike
thanks very much for the reply .i am using a resistive load .and one more thing which i have tried now is that i change my mosfet to a new mosfet which the gate charge is far less than the previous one first i was using SPP20n60 now i am using FDP18n50 which if far slower than the first one but with this i am able to switch the pfc even if i connect the load at out put so i think it is now much dependant on gate drive circuit do u have any idea how i can improve gate circuitry .and regarding the line current should it not bee sine wave following the line voltage
Best Regards
Muhammad Farhan Alam
Hello Muhammad,
I would have thought if this was a gate driver issue, you would have seen the issue at full load rather than at power up. If the converter worked fine at full load after power up this issue is not due to a weak gate driver.
When it comes to the gate driver 9A should be capable of driving one TO-220 FET. You can double check this with I=c*dv/dt and c = q/v just to make sure. Q is the amount of gate charge at the end of the miller plateau of the FETs Vgs characteristic.
This might have to do with the SPP20N60 being turned on too fast creating very large di/dts. This could be a layout issue. You could try slowing down the SPP20N60 FETs by increasing the resistor in series with the gate of the FETs and the gate driver. If this removes the issue then you know it has something to do with layout.
The input current waveforms should be a sine wave. I thought the waveform you had was not because the output did not reach 450V. If the output is lower than the input the bi pass diode can conduct creating a waveform similar to what you had sent.
Regards,
Mike
hello Mike
Thanks very much for detail answer
i have tried as u said about changing the resistor it works.i will try changing the layout also.
But regarding the current please clear my doubt below are two pictures showing line current (yellow) and line voltage (blue) at about 250w .first picture shows without turning pfc on the second picture is with pfc turned on and the voltage is 460v at out put
Without PFC
With PFC when 460v at output
Best Regards
Muhammad Farhan Alam
Hello Muhammad,
The first waveform without PFC does not look correct. There should be a spike of current at the peak of line when the line is peak charging the boost capacitor. I am seeing a positive and negative spike as the line transitions to the peak of line. There is definitely something wrong here.
The second waveforms also does not look correct. It looks like there is no current except at crossover. I am not sure how this is possible. The converter is dumping current into the line at the zero crossings. It is almost as if something is breaking down.
You might want to get a hold of one the 300W EVMs and evaluate it too see what these waveforms should look like. If you do not use the pwm ramp and offset that is recommend in the application note for the CSA/B signal (Pages 8 -11) you will get crossover distortion. However, it will not look like this and there is evidencing that PFC pre-regulator is working.
When you have a chance could post the schematic. I would like to take a look at it. There has to be something drastically wrong to being doing this.
Regards,
Mike
hi mike
sorry i was not able to reply during the last week but thanks very much for your detail answer .i have improve my setup of measurement and i have figured out that the current prob was not working at 50Hz so now i have use a current transformer from coil craft to sense in line current and now the wave form look like this as shown
Without PFC
With PFC working voltage of 460v
Blue is line voltage and yellow is current wave form
current wave form get distorted 400w and voltage drops to 400v
dose this looks at-least batter i will improve my setup more and "InshAllah" will try to get more better results . but i will be very thank full to u if u can suggest me some layout design tips or some application notes regarding mosfet driving layout tips i will be very thank full to you.and please do comment some on the above wave forms .
The input current waveforms do look better. However, when I look through the email thread the original questions was regaurding a 400W design with a 400V output. These waveforms have a note with the output voltage being at 460V and droping out to 400V. If the target output voltage is 460V and the output is dropping with loading there is probably an issue with your multilier setup and current sense resistor slection. The excel design tool should have helped you setup this correctly.
I had asked for a schematic previousely. I look at the email thread and it looks like you are using the UCC28070 EVM. What did you modify to convert this design to 400W? If you did not change the magnetics this maybe your issue because they were designed for 300W and could be possibly saturating. Also note the EVM gives a good reference for a good layout. The gerber files for this layout can be found in the UCC28070 product folder at the TI web site.
When it comes to layout the best paper that I have seen for this was chapter 17 "Circuit Board Layout Techniques" from a paper TI paper titled Op Amps for Everyong. Even though this paper is for Op Amps the layout techniques apply to power supplies. You can find the paper under the following link.http://focus-webapps.ti.com/general/docs/sitesearch/searchsite.tsp;jsessionid=Y3JPOAFY5ZFT5QC1JAVR3KQ?selectedTopic=1653260327&numRecords=25&searchTerm=%22Chapter+17%22&statusCode=null
Hi. Im doing a 1kW PSU using UCC28070 and I have encountered a problem regarding the output voltage ripple . Even during the voltage ramp before it reach the close loop voltage it has high ripple which is at 120Hz.
The snapshot above is the output voltage during start up @ 500W (half load condition).
And this is at no load condition.
Does anyone encounter this problem? or is this normal thing in using UCC28070? Thanks!
Hello John,
120 Hz ripple voltage on the output of a PFC pre-regulator is normal. To ensure that you have low input current THD and good PF a PFC loop crosses over around 10 to 20 Hz. The voltage loop is not fast enough to correct for the PFC output current which resembles a rectified sine wave at twice the line frequency. The following link will get you to an application note for the UCC28070. Equation 13 explains how ot calculate the boost capacitor ripple voltage. http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=slua479b&fileType=pdf
The 120 Hz output ripple from scope plot looks to be around 20V which is less than 6% of the output. This should be O.K. The down stream converter is usually designed worse case for a 2:1 input range it should be able to handle the 20V ripple without any issue.
Regards,
Mike
Hi Mike,
Thanks for the quick response.
Yes, the output ripple is around 20V. So this is normal. Thanks for the info.
But is there a way for me to eliminate the ripple during the ramp up at start -up?
I need the ramp to be smooth because this is reflected at the output voltage of the next converter during start up and I need the rise of the voltage to be monotonic.
Thanks for the help.
Regards,
John
Hello.
Could you please let me know witch Probe / Method you have used to measure the current wavefore.
Or if (ti ) can help by that answer.
Regards
Hello
I just found this by chance,
Never expect a real solution from ti, its just that simple. they even had a mistake in the formula for the UCC28070, it gives you wrong results, so your PFC will never work, they updated it after that. So try to think what does that means.
I had some serious problems with the UCC28019 IC, I had a problem with output voltage that it will never get regulated at load/No load condition, for example PFC in idle 380VDC at output, load the PFC voltage still 378VDC, remove the load it goes UP to 410VDC then it goes back to 380VDC after 30~40 seconds.
and they gave NO help, they even ignored my questions when it comes to the critical answers.
Reason is they dont want to spread the secrets to everyone, very simple. they focus on large scale manufacturers.
Specially the PFC is really critical project.
A friend of mind who discovered the mistake in the formula, had success with 3000W PFC with UCC28070.
Good luck