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LM5035C Simultaneous ON

K.Hamamoto
Guru 12155 points
Other Parts Discussed in Thread: LM5035C, LM5035CEVAL

Hi

Our customer evaluate LM5035C. They tested some abnormal test then they found simultaneous on(Ho/Lo).

Could you see following photo.

 They tested a short break test in the following sequence. 

 1.Vin=75V,Io=0A

 2.shut down Vin to 0V.

 3.restart Vin to 75V after 100us.

 4.Turned on simultaneously occurred in the restart after 100us.

Can you any advice for this phenomenon.

And could you let me know if you have any question.

Regards,

Koji Hamamoto

  • 0
    Guru 12155 points

    Hi

    I got additional information from our customer about this issue.

    The customer tested by changing a capacitor(Cuvlo) connected in parallel with the low side resistor of UVLO resistor. Also they removed the MOS FET  (Hi-side and Low-side of primary side) to find out this issue.

    Condition #1 (Cuvlo=1000pF)

    The phenomenon which we concerned occur. Please see below the waveform.

      

    Condition #2 (Cuvlo 100pF)

    However it disappear this phenomenon when they change Cuvlo from 1000pF to 100pF.(Please see below)

    Condition #3 (TI-EVM : LM5035CEVAL)

    The phenomenon occur when they test by TI-EVM without MOSFET as well.

    Why does this phenomenon occur. 

    I think this phenomenon occur because of the charge of the terminal somewhere in the instantaneous interruption time. Could you give us the reason why does this phenomenon occur.

    Our customer really would like to know the mechanism about this issue as soon as possible.

    Plese let me know if you have any questions.

    Regards,

    Koji Hamamoto

     

  • 0 in reply to K.Hamamoto
    TI__Expert 4015 points

    Hi Koji,

    Sorry for the delay replying. These plots all appear to show different performance. The first plot shows the High and low side being on simultaneously.

    The second plot shows the Hi-side going high after a dip in Vin. This may be due to the IC going into UVLO during the Input dip and restarting subsequently.

    The third plot shows both outputs low.

    The fourth plot shows different performance, the low side driver output appears to be externally charging after Vin is applied.

    It seems to me that the critical question relates to the first plot. I will see if I can get some information on what is causing this performance.

    Thanks

    Billy