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UCC28180D surge issue

Other Parts Discussed in Thread: UCC28180

The IC active abnormal when surge happens.

The main issues are:

  1. Comparing with former DCBUS voltage, the Vsense voltage should be higher than OVP point all the time. But from the waveform, the vsense voltage have fluctuation to drop down to 5.1V
  2. When the vsense voltage>5.1V, there still be big duty cycle here.

About first issue , I think we need to increase the vsense capacitor. But I am worrying about whether bigger capacitor would significantly reduce the control response time to output voltage deviations.Now the capacitor is 1n

About second issue, Is there any inference that would cause the OVP disable, please?

Channel 1: MOV voltage

Channel 2: Vsense voltage

Channel 3: Drive waveform(Gate voltage)

Channel 4: Vds of Mosfer

Add a output voltage waveform:

Channel 1: MOV voltage

Channel 2: Voltage between Bridge Rectifier pin 1 and pin 4

Channel 3: Bulk capacitor voltage

Channel 4: Vds of PFC Mosfet

  • Hi,

    During surge test, the ground noise is significant. This noise  make Vsense very noise.

    1. 1nF capacitor of Vsense pin is OK, you should put this 1nF capacitor very near to UCC28180 to filter the noise.

    2. There are two level OVP of UCC28180. The OVP_L threshold is 5.35V, if OVP_L is triggered, VCOMP will be discharge to limit Duty. The OVP_H threshold is 5.45V, if OVP_H is triggered, PWM will shundown immidiately. Because Vsense didn't exceed 5.35V, the OVP function was not triggered.

    3. Could you capture the VCOMP and ICOMP, the duty is defined by VCOMP and ICOMP.

    Regards,

    Yunsheng

  • Hi Yunsheng,
    Thanks for your quick reply!
    1. The capacitor is very near the UCC28180 pin. But as the waveform shows, there are also many noises here
    2. It is very strange. Our OVP set point is 429.339V (calculated by your excel).The Vsense voltage's flutuation would droped<5.35V even when the Bulk cap voltage still higher than 429.339V
    3. I would capture the waveform of Vcomp and Icomp and come back to you!
    BR
    Gene
  • Hi,

    The waveform of Vcomp and ICOMP are attached.

    It is a little weird that the Icomp is pulled to ~0.2V for a while

    Channel1: Voltage on the varistor

    Channel2: Vcomp

    Channel3: Icomp

    Channel4: Bulk cap voltage(output)

  • Hi, Gene

    1. Though the waveforms, there is OVP_H is triggered during surge test, then PWM is stopped. During the PWM is stopped, the Isense is 0, ICOMP is the average signal of ISENSE, so ICOMP is clamp to minumum level.

    2. I found the Vcomp has 10us spike when the output voltage is still higher than setpoint,  Is your setpoint  400V?

    3. Is there any concern on your board during surge test?

    regards,

    yunsheng

  • Hi Yunsheng,

    Thank you very much for your reply at your busy time!

    1.But our current sense resistor is in series with main circuit. If PWM is stopped, the high charge current for Bulk cap during surge always pass through the current sense resistor.So In my mind, I think there should be voltage drop on the Isense resistor and Icomp should be high,right?

    And we saw there is high duty cycle pwm pulse when the output voltage is higher than output set point during surge(Blue is the PWM pulse, red is vsense voltage,green is Vds,yellow is varistor voltage) I think the ovp is not always triggered during surge.

    2.The output voltage setpoint is ~394V.The spike is very strange because the output voltage is smooth. Do you have any ideas about that,please?

    3. We add a 275Vac varistor after the fuse,and one common choke and one differential choke(paralleling with a diode). The main surge energy flow into the bridge rectifier was absorbed by the Bulk cap in the output.

    BR

    Gene

  • Hi, Gene1. could you check the ISENSE pin wavefrom during surge test?
    2. what is the RC value connect to VCOMP?
    3. what is the C value connect to ICOMP?
    4. what is the RC value connect to ISENSE?
  • Hi Yunsheng,

    Attached is the circuit of PFC part.

    I planned to test the current with current probe.  I would send you the waveforms ASAP

    BR

    Gene

  • Hi Yunsheng,

    Here is the wavefrom of current:

    you could see the current flow through current sense resistor is still high during the whole surge time. But the Icomp have a obvious drop. That is what I wondering. We already paralleled a forward diode(S3JB-13-F) to clamp the voltage on the current resistor at big inrush current. But that couldn't explain why the Icomp could drop to ~0.2V, right?

    Through the vds waveform we could see there is big duty cycle when the current flow through current resistor is>70A. Is that OCP disabled due to interference?

    And in my ideas, former PFC IC would detect the input voltage and let the current to follow. If the input voltage is high, the duty cycle would be set high to make the current would follow the input voltage closely. I don't know what the strategy your One cycle chip use. Would it be a problem?

    Channel1: Voltage on the varistor

    Channel2: current flow into mosfet 1A/V

    Channel3: current flow through current sense resistor 1A/V

    Channel4: Vds on the mosfet

    Thank you very much!

    BR

    Gene

  • Hi yunsheng,

    Isense waveform is attached. You could see the Isense voltage is always higher than 0.44V. But the PWM pulse is not terminated. The maximum voltage of Isense is -3.7V. Is the high peak negative voltage would cause some problems? (In the datasheet, the absoulute maximum input voltage range is -21V to 7V. current is -1mA to 1mA.)

    Channel1: Voltage on the varistor

    Channel2: Isense voltage

    Channel3: Gate voltage

    Channel4: Output voltage

    BR

    Gene

  • Hi, Gene

    It is weird the OCP is functional when ISENSE lower than -0.4V. Is the chip normal after surge test?

    1. do you apply a diode in parallel with current sense shunt?

    2. could you increase the R value of RC filter in ISENSE pin?

    Please call me if anything unclear, 13916277909.

    regards,

    yunsheng