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UCC28631 Latched Fault mode

Other Parts Discussed in Thread: UCC28631, UC1845, UCC28630, UCC28700

UCC28631 is exhibiting a latched fault mode of operation. No PWM operation with VDD swinging between 8V and 10V.

Presume this due to pin fault detection. Appears to be associated with the DRV output as the low side switch appears to be stuck ON (1.2 ohms to GND) after removal of power. After some period of time, output goes to high impedance.

How to resolve pin fault startup issue?

Separate issue:

When it does startup, it doesn't appear to regulate. Demag time meets Tsample setup timing, but appears as though being ignored or not responding appropriately. Shuts down/Auto-restart due to Over Voltage protection.

  • Doug,

     

    There are a few possible causes for latched fault mode on the UCC28631:

    - CS pin open (or the series feed resistor is too large > 10k)

    - CS pin shorted to GND accidentally

    - VSENSE pin open (or Thevenin resistance of the divider pair across the aux winding is too large > 20k, or one or other of those resistors is open)

    - VSENSE pin shorted to GND (or Thevenin resistance of the divider pair across the aux winding is too small < 10k, or one or other of those resistors is shorted)

    - DRV pin is externally shorted to GND (or pulled low through too small a resistmace < ~2k)

     

    If none of those events is really there, then one possible issue could be down to testing the power stage at very low input voltages to start off with. Depending on the power level and the value of Lmag and Rcs, at low input voltages, the di/dt of the primary current can be very shallow, so that the current peak value can be very small. If it's small enough, then there is a chance that it could be accidentally identifed as a potential short to GND and trip the pin-fault protection.

     

    If the initial applied input voltage is increased to a higher level, it should be possible to start up, where the peak current can get high enoguh to be recognised as a good non-shorted level.

     

    It sounds liek you can get it to startup sometimes, so I suspect that this could be the cause. However, it also sounds like there is still some issue causing an output OV. If you want to share your schematic, transformer Lmag and turns ratios, some waveforms, maybe your design spec (power, Vout, Vin, etc), I can try to offer more help and suggestions.

     

    Regarding the DRV pin, once the VDD level goes below 5 V, the IC resets, and in this reset mode, the DRV pin internally pulls-down by default to prevent the gate of any external FET from floating up. This pull-down can remain active for a time after VDD is removed from the IC due to held charge on an internal gate.

     

    Thanks,

    Bernard

     

     

  • Bernard, Thanks,

    Too many unknowns with this chip for my application. Sounds like it was targeted at HV off line applications and if one deviates from that recipe, then all bets are off. Falling back to a tried and true fixed frequency UC1845 with external compensation network.

    Doug
  • Doug,

    Yes this IC family was designed for high input voltage applications using universal AC mains range 90-264 Vac input. Or the peak rectified DC equivalent of approx. 120 to 370 Vdc (UCC28631/2 only).

    As long as the input voltage range is a subset of the above range, the IC can be used over a wide range of power levels, output voltage levels, with a lot of flexibility and system level advantages (low standby power, good light-load eff, output CC mode protection, peak overload power capability with smaller transformer size, etc).

    But unfortunately they are not suitable low voltage (<100 Vdc) input.

     

    What is your application input voltage, output voltage, power etc? if you cna shre some specs/requirements, I can let you know if your application is compatible, and help you to optimise your design to make the UCC28630 work for you.

     

    Thanks,

    Bernard

     

     

  • Bernard,

    Details are as follows: but don't spend any significant time on this as I've changed over to the UC1845 and it's working as intended, as expected.
    FYI:
    55V to 15V converter
    Vin(nom)= 40V to 55V (predominantly pre-regulated at 55V)
    Vout = 15V
    Pout = 0.5W to 15W
    Transformer: Np:Ns:Ns:NAux = 2.67:1:1:1
    Lprimary = 41uH

    Modified pull-up resistor Rp to get it to turn ON. By adding Rprog < 10K, got it to regulate, but operation appeared to be in power limiting mode, as output was loaded Vout fell away. (operation appeared as fixed Ipeak = 640mV, with approx fixed frequency around 65-70KHz)

    While it may have been designed for the HV environment, it can be modified to turn ON,
    However, I believe by modifying Rp to get it to turn ON, together with my 2.67:1 transformer, the internal gains (i.e. Kline) may appear to have been modified effecting the compensation loop. Part appeared attractive as might be the UCC28700 series but not having access to the compensator leaves me leery.

    Doug
  • I'm having an issue similar to this as well. I started my AC source from 0VAC and slowly ramped up the voltage to the ACon voltage. I haven't tried turning on the source at say 100VAC for testing but I was wondering if this could cause the device to not turn on correctly and get stuck in a latched state?

  • Michael,

    Yes, it is possible to trigger the CS pin fault detection if AC input is increased very slowly, depending on the particular design and the value of primary inductance Lmag and current sense shunt Rcs.

    If Lmag is quite large, and Rcs is high value, then the di/dt can be very shallow at low input voltages, and the sensed signal at the CS pin can be so small that it appears to be shorted to GND. If the RC filter on the CS pin is excessive, this can also contribute to falsely triggering the CS fault protection.

    If this is the case, then starting at a higher initial AC level should fix the problem. For sure by 70-80 Vac, it should be able to start ok with no problems.

    Unless your board has a fault, and there is a genuine CS pin fault?

    Hope this helps you out.

    Regards,

    Bernard