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Synchronous-Buck MOSFET Drivers question

Other Parts Discussed in Thread: TPS2838, LM5106, LM5109B-Q1, TPS2836

Hello all,

I am just new with these type of drivers: TPS2838/38/48/49. They are called 'Synchronous-Buck MOSFET Drivers'. My question is, can they be used only for driving buck converters? or can I use them for boost converters as well?

Thank you so much in advance,

Leo

  • Leonardo,
    Are you doing a synchronous boost or diode rectification? That will determine what driver for fet(s) is best
  • thanks John,

    In the end I am using LM5106 for a Synchronous boost converter.

    Regards,

    Leonardo

  • Leonardo,
    thanks for your reply. I've asked our driver team to comment if that's the best fit. they should reply soon.
    Regards,
    John
  • Hi Leonardo,

    LM5106 can be used for driving MOSFETs in conventional synchronous boost configuration.
    I am sure you already know that in Synchronous boost configuration, the main power FET is low side FET and synchronous FET is high side FET.
    The bus voltage for the driver will be Vo+VDD. This voltage must be less than recommended maximum voltage on HB pin of LM5106, which is 114V.

    Please let me know if you have any other question.

    Thanks and regards,
    Ritesh
  • Thanks Ritesh,
    actually I have another question. Can you power LM5106 with VDD=15V? the datasheet says maximum rating is VDD=18V, but recommended operation is VDD=8-14V.
    Thanks again.
    Leonardo
  • Hi Leonardo,

    The recommended value comes from full characterization testing of the part.
    Part performance across all corners is guaranteed when operated under recommended conditions.
    In power supply designs, there exists spikes and noise on VDD, specifically under transient conditions.
    Therefore, it is good idea to have some margin.
    If you have to operate the part at 15V, you can perform extended system qualification tests on your system to make sure that the life or performance of the part (and thereby system) is not jeopardized.
    Please let me know if I can be of any further help.

    Thanks and regards,
    Ritesh
  • Hi Ritesh, thanks for your support.

    Actually, I have other few queries on how to best used this gate driver LM5106, hopefully you or someone in the e2e forum can help.

    I am using LM5106 to drive a synchronous boost converter. The MOSFET switches I use are as per datasheet (http://www.infineon.com/dgdl/Infineon-IPP075N15N3-DS-v02_06-en.pdf?fileId=db3a304319c6f18c0119cd76cc527ab6 ) and table below.

    I am using an external gate resistance of 10ohm/0.5W. Also I connect a resistance between the gate and the source of each switch of 10kohm/0.125W. The gate driving voltage is 12V, and the switching frequency 200kHz. Below you also find a picture of the configuration of the synchronous boost, with the circuit external to the gate.

    1) What do you think of the components values (external gate Resistance 10Ohm, gate-to-source Resistance 10kOhm) I have chosen? and also should I connect a resistor in series with the diode paralleled to the external gate resistance?

    2) Another point deals with the bootstrap capacitor, which I have chosen of the value of 1uF. Do you think this is suitable to drive the switch I have chosen at 200kHz?

    In this configuration I experience a high ringing of the switches drain-to-source voltage, and I am trying to investigate if the value of the components I have chosen for the gate driver (i.e. bootstrap capacitor) and the external component to the switch driving port (i.e. external gate resistors/diode) might be a cause of the ringing.

    Thank you so much for your help.

    Leo

    Datasheets IPx072,75N15N3 G
    Family

    FETs - Single

    FET Type MOSFET N-Channel, Metal Oxide
    FET Feature Standard
    Drain to Source Voltage (Vdss) 150V
    Current - Continuous Drain (Id) @ 25°C 100A (Tc)
    Rds On (Max) @ Id, Vgs 7.5 mOhm @ 100A, 10V
    Vgs(th) (Max) @ Id 4V @ 270µA
    Gate Charge (Qg) @ Vgs 93nC @ 10V
    Input Capacitance (Ciss) @ Vds 5470pF @ 75V
    Power - Max 300W
    Package / Case TO-220-3

  • Hi Leo,

    10 ohm gate resistor is good for limiting the peak pull-up current (about 0.58A) but diode without resistor not enough to limit peak pull-down current (1.8A/1.9A).

    I recommend putting a resistor in series with diode. You can always put a 0 ohm resistor if that is what you would decide later.

    Bootstrap capacitor value highly dependent on minimum and maximum duty cycle as well as switching frequency.

    It also dependent on what is your start-up requirement.

    In case of boost converter, the duty cycle is determined based on how long low side FET is ON.

    In your case the period is 5us, let us say maximum duty cycle is 50% and minimum duty cycle is 10%.

    That means, minimum ON time of low side FET is 250ns.

    In steady state operation, bootstrap capacitor need to replenish the charge in this minimum ON time, 250ns.

    Voltage drop due to bootstrap capacitor discharging into power MOSFET gate, in your case, is 70mV. Let us say 100mV as a ballpark number.

    If peak charging capacity of the bootstrap diode is 1A, it would take 100ns to replenish 100mV drop, which is lower than 250ns minimum ON time of the low side FET.

    During the start-up, when bootstrap capacitor is completely discharged, it would take about 10us to charge 1uF capacitor to 10V.

    That means, you would see only low side pulses out of the driver for initial few cycles, but that should be ok as your bypass diode on the boost converter should be charging the output capacitor anyway (avoid right half plane zero in boost converter).

    If above assumptions are correct, 1uF of bootstrap capacitor is fine, make sure it is at least 25V X7R or better.

    Ringing is dependent on multiple aspects. Do you have a very well laid out board? Parasitic inductances should be minimized as much as possible.

    You can try to place RCD snubber or active snubber across the FET.

    You can also try to play with the gate resistor and see if reducing dv/dt helps you.

    You can also try to place very low reverse recovery diode across high side FET and see if that helps.

    I hope this helps.

    Please look at LM5109B-Q1 datasheet on how to calculate the value of external gate resistor (and also some other insights).

    Regards,

    Ritesh  

  • Hi Ritesh,

    thanks for your very good answer it really helps.

    As I am still new to this topic, and try to shape an understanding can I ask:

    1. how did you calculated peak pull-up current of about 0.58A and peak pull-down current of 1.8A/1.9A ?

    2. Voltage drop due to bootstrap capacitor discharging into power MOSFET gate, in your case, is 70mV. What is this voltage drop? is it across the bootstrap capacitor?

    3. Is the voltage rating of the bootstrap capacitor dependent on the Vcc supply? which is 12V in my case.

    4. Does the bootstrap diode reverse breakdown voltage need to be higher than the (VDC) DC bus voltage (load voltage) minus VCC?

    Thank you so much

    Leo
  • Hi Leo,

    You are most welcome. Glad to help you.

    1. As I mentioned in my previous email, LM5109B-Q1 datasheet has detailed description of how to calculate peak pull-up and peak pull-down current based on driver IC internal parameters and other circuit external parameters such as gate resistor and power MOSFET internal gate resistor.

    2. Yes, 70mV is voltage dip on bootstrap capacitor. As you know, bootstrap capacitor charges the gate capacitance. Therefore, charge transfers from bootstrap capacitor to power MOSFET gate. You can use Ic =  CdV/dt to calculate dV across bootstrap capacitor. You can find plenty of online material as well.

    3. Effective capacitance of MLCC type capacitors decreases with bias voltage, temperature, and age. Therefore, if the bias voltage is 12V, one should at least use 25V capacitor. TDK and Murata might have detailed documentation on this topic.

    4. Yes, bootstrap diode reverse breakdown voltage has to be at least the same as the rating of the driver. It should be of low forward voltage drop, low leakage, and fast recovery type.

    Regards,

    Ritesh

  • Hi Ritesh,

    thanks for your reply. I have been reading LM5109B-Q1 and it is very useful as you said. As an example I have reported my calculations below with some questions. I would grateful if you or someone else in the forum could have a look and provide an opinion.

    1. On the value for the boot capacitor for my application, I can calculate it like: Cboot=Qgtotal/deltaVHB, being

    Qgtotal = 93nC (maximum value), the total gate charge for my IPP075N15N3G MOSFET

    deltaVHB = 12V (driver dc supply) - 1V (boot diode voltage drop) - 6.9V (is this the mosfet Vgsmin? or what else?)

    Noting that the value of 6.9V seems to be an undervoltage protection value (I am not really clear on this), but the LM5106 datasheet says it is Vgs,min. So what value should I use for the last figure in deltaVHB? My switch Vgs,min = 4V, but the TI datasheet uses this 6.9V value (related to some sort of undervoltage protection if I understand correctly). An explanation from TI would be good on this.

    Assuming 6.9V is correct (to be confirmed), then deltaVHB = 4.1V and Cboot=22.7nF. With some (large) margin, I can choose a Cboot=0.5uF.

    Also I can choose a Vdd filter capacitance value of 2.2uF.

    2. Using Cboot=0.5uF, if I need a minimum duty ratio for the boost of the 5% and fsw=200kHz (Tsw=5us), then the minimum on time of the lower switch is 5%*(5us)=250ns. This is the time when the boot capacitor is charged through Vdd and when the charged previously supplied to the gate during the remaining 95% of time, needs replacing. This charge is Qgtotal =93nC (using the max value from the switch datasheet). Being the voltage drop on the boot capacitor deltaVboot=Qgtotal/Cboot=93nC/0.5uF=186mV. This voltage drop needs to be "compensated for" during the on time of the lower switch (when Cboot is charged), so let's see if it is enough time.

    Considering that my Vdd supply current is limited to Idd=0.3A (well it is 0.42A but some other devices are supplied by the same Vdd), the charging time of the capacitor to raise its voltage of 186mV is deltaT=C*deltaV/Idd=0.5uF*186mV/0.3A=310ns which is higher than the minimum on time of the lower switch (250ns), therefore this tells me that I should choose a higher value for the boot capacitance, or a longer minimum time for the lower switch.


    3. By looking at LM5109B-Q1 datasheet I understand now how to calculate the peak pull up and pull down currents on the HO and LO outputs. You are right, I believe I need a resistance to limit the pull down current, so the diode by itself in antiparallel with the external gate resistor is not good enough. I will add a resistor to act during switch turn off.

    4. I do not have any particular startup requirement, so it is fine to wait for few switching cycles before the boot capacitor is charged.

    Thank you so much,

    Leonardo

  • Hi Ritesh,

    I meet the same problem, while the difference is the boost circuit need to work from at least 5V ~13.2V. LM5106 recommended operation VDD is 8~14V which is not satisfied with us.

    So could you recommend one for us? We ordered some tps2836, while not know whether that chip can work.

    Thanks,
    Best Regards,
    William Gao
    www.agigatech.com
  • Hi William,

    Can you please explain the problem in more detail?

    Boost converter can operate from 0 to 100V, the Vdd need to be 8 to 14V if you want to use LM5106 driver.

    Are you saying the input votage of boost converter is 5V and output voltage is 13.6V?

    Or input voltage range of boost converter is 5V-13V and you are using this input voltage as Vdd of the driver?

    Can you also provide the specifications of your application?

    Thanks and regards,

    Ritesh

  • I think there is an minor error in the above description:

    "In case of boost converter, the duty cycle is determined based on how long low side FET is ON. In your case the period is 5us, let us say maximum duty cycle is 50% and minimum duty cycle is 10%. That means, minimum ON time of low side FET is 250ns."

    It should be

    minimum ON time of low side FET is 500ns = 10%*5us.

    Please let me know if this is incorrect,

    Many thanks

    Leo