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UCC28631 Latching

Michael Delany
Prodigy 60 points
Other Parts Discussed in Thread: UCC28631

Hello,

I've tried implementing a universal input 45W flyback converter using the UCC28631 controller. My problem is that after following the datasheet and doing calculations and doing verification calculations (verifying Rcs with Lpri, turns ratio etc) in the datasheet, my converter won't maintain the desired output and is stuck in latch fault mode (between 8V and 10V on Vdd).

I've tried slowly ramping the voltage and also turning the AC source on instantly, neither worked.

The output is supposed to be regulated at 12V. I've read another post similar on E2E, but wanted to list the details of my converter here. Attached is my schematic:

I've followed the datasheet pretty meticulously and have performed the following measurements:

  • CS to GND ~1k ohm
  • DRV to GND ~4.7k ohm (also tried 100k and no resistor)
  • VSENSE to GND ~4Meg ohm
  • VSENSE thevenin resistance ~= 10.5k ohm
  • Initially left SD floating but after reading datasheet again I tried 470k resistor to ground, similar to a reference design and that didn't work. Tried other values that were higher than 9.5k ohm

I also changed Vdd to 20uF in the event there wasn't enough hold up. Checked continuity and everything looks good. Performed design calculations against 4% transformer leakage and measured a k ~= 0.98.

Lpri = 1.25mH

Np = 68 turns

Na = 9 turns

Ns = 8 turns

I made the transformer myself, which was a first attempt, but I double checked turns ratios by measuring inductances and verified primary inductance after filing core. I also verified that the secondary and aux windings were 180 degrees out of phase with primary winding.

Also, here a few pictures of the board (which has been reworked and probed quite a bit)

Any help would be appreciated

  • 0
    Prodigy 60 points
    Edit: Typo: VENSE to GND not 4Meg ohms. Supposed to be referring to SD pin.
  • 0 in reply to Michael Delany
    TI__Expert 4015 points

    Hey Michael, I don't see anything obvious wrong with your schematic at first glance. Can you probe the switch node waveform when the Vcc hits the turn on threshold and attach it. When the Vcc reaches the threshold, it should give three drive pulses to turn on the FET and measure the line. If it is not generating those pulses it is registering a fault on turn on.

    Also, maybe its just the pictures but I'd make sure no solder shorts have occurred between the pins during re-work.

    Thanks

    Billy

  • 0 in reply to Billy Long
    Prodigy 60 points

    Billy,

    Thanks for your feedback. I've redesigned the transformer by changing the primary inductace and slightly modified the turns ratio.

    Lp = 560uH

    Np/Ns ~= 9.2

    Ns/Na ~= 1

    In addition, I've modified the feedback resistors for the Vsense pin and now the converter outputs the 12V as expected.

    However, I'm having issues with the output voltage drooping when the load is increased (12W output drops the output by about 1V). I'll take some waveforms and post them tomorrow. I was curious if there are any recommended debugging steps for this kind of behavior.

    Thanks

  • 0
    Prodigy 60 points

    Billy,

    I'm attaching some waveforms from the oscilloscope (linked after all the pictures). The majority are the output voltage and the current through the current sense resistor (Rcs). There is a waveform where I show the switch node voltage, output current, and current sense on one waveform.

    On the waveform with the switch node voltage, some things I've captured include:

    • Switch node voltage
      • Switch node voltage resonating frequency 
      • Max switch node voltage
      • It appears that there is about 30V spike added to Vswitch due to the leakage inductance
    • Current sense
      • Peak value of current sense
    • Output current (RMS value added to waveform)

    Also, here is the measurement setup:

    45W_Flyback.zip

  • 0
    Prodigy 60 points
    I believe I've mostly resolved the problem. The zener clamp was clamping too low and this was causing output regulation issues. I've added another zener in series and the output regulates just fine.
  • 0 in reply to Michael Delany
    TI__Expert 4015 points

    Hey Michael, great stuff. I didn't see your post on Wednesday until now so sorry for the delay replying. What you say adds up, too low a zener will clamp the reflected voltage low and cause Vout to regulate low. I might cause the Zener to get pretty hot too. FYI the pedestal at the start of the winding voltage waveform is probably caused by the bias current. When the bias is being supplied the winding voltage will be the reflected from the bias winding.

    Good job, thanks, Billy