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UCC24630 - Dealing with overvoltage at startup

Other Parts Discussed in Thread: UCC24630

Dear all

I have a flyback design using UCC24630 as secondary-side rectifier, which at startup shows a quick overshoot near 30V (vout nominal is 24V), a dangerous level for UCC24630.

I know I have to fix it in other ways, but my question is: Is it recommendable to make a simple zener supply (of 20V for instance) just for the controller, in order to protect the IC? I'm about to test it on the bench, but I'd like to listen to more opinions.

- The datasheet says on page 31 that it is good to have a small resistor in series with the VDD pin, but I believe this is not enough to protect it.

- I though about some sort of TVS, but a zener supply seems ok and should be easier to filter its output properly for the controller.

Thank you all

Best regards

  • Renato,

    What controller is used on the primary side? Does it use PSR (primary-side-regulation) or opto feedback?

    Does the 30-V overshoot occur only at no-load or light-load, or at heavy load, or at all loads? Can you post some waveforms?


    For sure, it would be wiser to try to eliminate the overshoot be design, by adjusting the primary controller and/or feedback.


    But it would also be ok to limit the VDD of UCC24630 using a resistor/zener. You would need to be sure that the series resistor is not too large, that it limits the VDD voltage too low under some conditions. You also need to be sure that the VSC divider is still conncted directly to Vout, not VDD.

    I hope this helps. If this answers your question, please click the "verify answer" button.

    Thanks,
    Bernard
  • Dear Bernard

    Thanks for your prompt reply, and I really apologize for the long delay before answering to you.

    About the overshoot question, I could manage it a little bit better and the peak is not in 30V anymore (the worst case was no load/light load, although with full load it still occurred), but I still think it is good to have a regulator on UCC24630, for security purposes. My power supply uses a switcher from Power Integrations, with optocoupler feedback.

    As mentioned, I performed the test with the zener supply and it worked as it should, but unfortunately I was already facing a huge instability on it, at the point of the zener supply modify its behavior. Probably my layout has part on it, and what happens is that  some pulses are not generated properly, lowering the output voltage and creating audible noise. I'm already using decoupling capacitor of 100nF (also tested with 1uF in parallel), and also small capacitors of 47pF on VCP pin. The components were calculated using a spreadsheet from TI. The instability is worse on low input voltage (~90vac) and full load, but it also happens on higher input voltage.

    I have to deal with some other points before going back to this issue, and so I'll collect more information and waveforms to bring here.

    If you have some more tips for good operation, please let me know.

    Thanks

    Renato

  • Hello Renato,

    It is not a good idea to place 47pF on the VPC input. Assuming the Rvpc2 resistor value is 10kohm as suggested, the 47pF capacitor adds a 470ns time constant to the signal at VPC. The effect of this time constant is to delay the turn-on point of the SR-MOSFET, because the falling VPC signal (when the primary MOSFET turns off) must cross below 50mV (effectively the zero-crossing) before the SR-MOSFET is turned on. This delay is worse at high line, because the peak VPC voltage has a longer fall time to the same threshold than at low line.

    Now with the SR turn-on being delayed by several time constants, the SR MOSFET will stay on until the accumulated Volt-seconds for the demagnetization time balances that of the primary on-time. This may result in the condition where the SR MOSFET is still on when the primary MOSFET turns on, causing reverse-current shoot-through. The primary controller will detect this peak current and shut off within its detection and propagation delay time, but the primary peak will be very large and the duty cycles will be erratic. This probably is causing the audible noise that you hear, and the poor regulation.

    Presenting waveforms is a good idea, along with line and load conditions and the actual values of the components used around the SR controller.
    The first thing to do though, is to remove all capacitance from the VPC input.

    Regards,
    Ulrich
  • Dear Ulrich

    Thanks for your support. I really didn't think about it when I put some capacitance on that pin, I just though about 'cleaning' the signal, but of course in high frequency signals that capacitance matters. My primary switcher is operating at 132kHz.

    I saw something about it on datasheet, page 31, but there is written that the maximum value is 10pF, so I have to see what I really put on the circuit... Anyway, I'll go back to the bench without that capacitance, and collect some data to share with you all.

    Best Regards
    Renato