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UCC28070: Problem about delay rise time for low temperature

Guru 19475 points
Part Number: UCC28070

Customer is evaluating UCC28070 and one problem below, please let me know about any reason or the same example.

【Condition】

・UCC28070 board is put 0℃ room for one day, and after evaluate.

【Problem】

・About GDA and GDB, these are delay rise time or not rise.

・If repeat start up, results are delay, too (delay time are variations).

Best regards,

Satoshi

  • Hello Satoshi-san,

    I have alerted the appropriate applications team to address your issue. Please look for a response from them, soon.
    I anticipate that additional information will be requested, so if you can please provide waveforms and more details about the test conditions (input V, output load, % of maximum load, etc.) it may save some time to resolution.

    Regards,
    Ulrich
  • Ulrich-san

    Thank you for reply.

    Additional information is below,

    ①Vin:AC100Vrms

    ②Pout:670Wrms / 1000Wpeak

     ※For these problem, a few watt condition is occur, too. 

    ③Waveform is attached; one normal operation and three abnormal operation.

    Best regards,

    Satoshi

  • Hi, Satoshi

    1. Do you have PFC_OK signal for secondary stage?

    2. Have check VCC of UCC28070 and PFC driver when PFC is delayed?

    3. I saw the AC input voltage is very close to 85Vac, could you check you components design follow below calculator?

    /cfs-file/__key/communityserver-discussions-components-files/196/2273.2742.UCC28070-Design-Tool-8-15-08.xls

    Regards,

    Yunsheng

  • Yunsheng-san

    I answer your question, Please see below.

    1.Customer don't have these signal for secondary stage.

    2.Vcc waveform is attached below.

    3.Customer calculated by design tool, phase margin is about 63deg.

    Best regards,

    Satoshi

  • Any update on this?
  • Hi, Satoshi

    Since SS pin starts to ramp up, so UCC28070 is enabled. There is no PWM out, the reason could be fault signal is generated:

    1. check the CSA/CSB and PKLMT waveform, is cycle by cycle triggered?

    2. OUTA/OUTB is connect to driver, the driver may affect OUTA/OUTB. could you check if disconnect OUTA/OUTB and driver?

    3. Is the resistor divide rate  of VINAC and VSENSE pin same in customer's board. UCC28070 requires  resistor divide rate  of VINAC and VSENSE pin are same.

    Regards,

    Yunsheng

  • Yunsheng-san

    Thank you for advice,

    I answer your question below, I feel that the reason is PWM output side.

    If there found some point, please let me know. 

    --------------------------------------------------------------

    1. check the CSA/CSB and PKLMT waveform, is cycle by cycle triggered?

    ⇒Waveform is attached below.

    2. OUTA/OUTB is connect to driver, the driver may affect OUTA/OUTB. could you check if disconnect OUTA/OUTB and driver?

    ⇒Customer test for the condition of disconnect driver, the results are the same.

    3. Is the resistor divide rate  of VINAC and VSENSE pin same in customer's board. UCC28070 requires  resistor divide rate  of VINAC and VSENSE pin are same.

    ⇒Yes, these divide rate are the same.

    --------------------------------------------------------------

    Best regards,

    Satoshi

  • Yunsheng-san

    Is this Failure device?
    If no, is there have a case of abnormal operation by after left cold room(0℃) for a long time?

    Best regards,
    Satoshi
  • Hi, Satoshi

    I did not find abnormal operation, and the issue was gone only by warming the chip,  I suspect this chip is failed.

    Have you tried another chip? It is best to choose another chip from different date code.

    If another chip from different date code can solve this issue, you can send suspected fail chip to FA.

    regards,

    Yunsheng