TPS28225: Blowing up in wireless charging design

Hi Graham,

Thanks for considering TI for your designs. I will try my best to help you.

For most part the schematic looks good except 10k resistor from high side gate to the analog ground.

Would you please provide some more details such as failure operating mode such as start-up, steady state, load transient, etc....?

Do you have some waveforms that you can share?

Do power MOSFETs also fail when driver fails?

Generally one or more specification violation is the cause of driver failure.

I recommend to start taking waveform of each pin of the driver under the operating condition before it goes into failure.

Let us look into this more once you have more details.

Regards,

Ritesh

Hi Ritesh,

Thanks for your reply, I will remove the two 10K resistors.

The drivers fail after being on for some time. The FETs survive.

I'll take some waveform plots.

Thanks,

Graham

Here are the oscilloscope plots, with +FET_PWR set to +2V.

Pin 1

Pin 2

Pin 3

Pin 4

Pin 5

Pin 6&7

Pin 8

Thanks,

G

U14 blew up again this morning before I made any measurements - with +FET_PWR set to 3V.

Hi Graham,

Thanks for the tests.

It seems that you are not using regular oscilloscope, such as Tektronix or Lecroy.

I believe you are using some system machine to gather the data and then plot it.

If that is true, then that method wont be very useful in diagnosing the problem.

Are these measurements with respect to pin 4, GND, of the driver?

I noticed that even though the bus voltage is set to 2V, the PHASE pin shows only 1.5V.

That does not seem correct, unless the high side MOSFET has 500mV of voltage drop.

There also seems+/-0.2V of AC noise on the ground. It is not too much but if the actual negative amplitude is larger, then that might cause higher substrate currents.

I also noticed that there is no local bypass capacitor across VDD to GND. This is must for any gate driver IC, as most of the peak driver current comes from this bypass capacitor. It is possible that actual peak voltage on VDD or BOOT might be higher than allowed in some operating condition.

Again, I highly recommend to measure these voltages with the high frequency scope and probe so that we can get better idea.

The absolute voltage levels are low enough to cause any damage. I believe the instantaneous voltages might be high or negative to cause the damage.

You mentioned that part works fine for a while and then damages. Is the system at completely steady state or something different going on at that time?

What is your failure rate? In other words, did all the drivers you used so far got damaged eventually?

Did you try to monitor the case temperature of the driver after you turn-on the system?

I hope this gives you some more ideas to test.

Regards,

Ritesh

Hi Ritesh,

Thanks for your reply.

I am using a USB Picoscope. Is that no good?

Yes all measurements are with respect to pin 4, GND.

There is 1 x 100nF and 1 x 470nF per FET driver, is that not enough?

The system is steady state while running and then into failure - there are no changes in the system.

Yes, all U14 drivers so far have failed. U14 seems more prone to failure.

I have only monitored case temperature to touch - it is fine while the circuit works, but is red hot when the part has failed.

Thanks,

Graham

Hi Graham,

Thanks for your answers.
I believe that probe might not be the best probe for investigating this issue.
Sorry about the caps, I kind of missed it. I hope they are placed very close to the driver and hopefully on the same board layer as the driver.
Did all the drivers failed after about the same time or they fail at completely random time?
The only difference between U14 side of the circuit and U11 side of the circuit is C110, C111, C112.
See if you balance them out and observe any difference in performance.
I can recommend couple of other tests that you can try to find out where the failure occurs.
You can try to reduce the VDD by couple of volts and observe the performance.
Supply high side bias using two external bias supplies and keep it about 1V higher so that the internal bootstrap diode is reverse biased.
Remove R40 and R53 and observe the difference in performance.
Do these tests one at a time so that we can clearly understand the effect of each change by itself.
Also, may I know which pins get shorted when driver gets damaged?

Let us see what else we can find.

Regards,
Ritesh

Hi Ritesh,

Yes the caps are right next to the driver and on the same side.

They all failed after about an hour of use.

I will try caps on both sides of the coil - thanks.

Can you explain what you mean here please - I don't understand:Supply high side bias using two external bias supplies and keep it about 1V higher so that the internal bootstrap diode is reverse biased.

We have observed large spikes on the Phase pin:

How would you suggest we reduce those spikes?

Thanks,

Graham

Could you please also explain the Absolute Max rating for the Phase pin, the datasheet is confusing.

Thanks,

Graham

Hi Graham,

I am sure you got the idea that supply voltage for high side MOSFET (MOSFET that is referenced to PHASE node and not the ground), is being generated using the bootstrap technique (there is an internal boot strap diode connecting VDD pin and BOOT pin. This diode charges the bootstrap capacitor connected from BOOT to PHASE when the low side MOSFET, the one referenced to ground, is turned ON).
To see if there is any issue with the bootstrap circuit, we need to eliminate it.
The way to eliminate it is to connect an external lab power supply from BOOT to PHASE, with voltage set 1V higher than VDD so that internal bootstrap diode is reverse biased. You need to use two different power supply for two drivers.
And then test the circuit and see if the driver fails. I hope this is little bit more clear than before.
Phase voltage maximum rating is VBOOT +0.3-VDD, where VBOOT is the voltage at the BOOT pin which is generally VDD + Vbus.
Did you check with pins on the driver are getting shorted?

Regards,
Ritesh