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PMP11451: Why is the supply voltage VDD for UCC28740 17.3V?

Part Number: PMP11451
Other Parts Discussed in Thread: UCC28740,

Hi,

According to the datasheet of UCC28740 (e.g. page 10), the required "turnon UVLO" voltage to start the chip is 21V. But in the schematic of PMP11451 the VDD of UCC28740 is only 17.3V:

The voltage from the auxiliary transformer output is at first rectified (D9, C100) and then regulated to 17.3V by selfmade LDO (Q1, D10). 18V - V_BE = 17.3V.

So 17.3V is less than 21V and thus not enough to start up the device.

Am I wrong?

Thx

Daniel

  • Hello Daniel,

    Your are correct; 17.3V is not enough to start up the device.
    The UCC28740 has an internal high-voltage switched current source at the HV input. This limited-current source is used at power-on to charge up VDD to ~21V from the bulk voltage. Once VDD reaches 21V, PWM switching begins and the output voltage rises to regulation level. At that point, the auxiliary winding provides the voltage to maintain VDD and the HV source is turned off. VDD voltage then depends on whatever the aux winding bias circuit provides, which may be higher or lower than the 21-V start-up threshold. Please refer to the UCC28740 datasheet for details.

    The PMP11451 is a reference design for USB-PD applications where the output voltage can be programmed to 20V, to 12V, and to 5V. Since this wide output variation is reflected to the auxiliary winding, and in this specific design there is only a single aux winding, the Aux to Sec turns ratio is such that when Vout is set to 5V it provides about ~12V to VDD. As a consequence, at 20V output the aux winding generates about 50V which is too high for the controller VDD input. The linear regulator Q1 limits VDD to about 17V when Vout > 5V, and saturates when Vout = 5V.

    I hope this makes it clear how the controller starts up and subsequently maintains VDD while running.

    Regards,
    Ulrich