• State
  • Locked Locked
  • Replies 6 replies
  • Subscribers 62 subscribers
  • Views 3835 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCC3895: 3KW Phase-Shift Full-Bridge Converter

Leo HUANG
Prodigy 40 points
Part Number: UCC3895
Other Parts Discussed in Thread: TL431, UCC27714

My design circuit is shown in the file. I want to design a 3kW Phase-Shift Full-Bridge Converter.

But my ZVS didn't show up clearly, and my TL431 reference voltage cannot reach 2.5V.

Mosfet frequency is 50kHz.

When I use a DC power supply to input power, my voltage is limited.

I hope my maximum voltage can reach 400VDC.

My transformer turns ratio is 13:2:2.

I don't know how to change my circuit design> PSFB_V2.SCH

  • 0
    TI__Mastermind 25570 points

    Hello Leo

    I couldn't open your schematic - can you tell me which package you used to create the .sch file please. Or could you simply post a .pdf version.

    Can you let me know your input voltage range and the output voltage range

    Can you let me know the maximum voltage you can get out of your DC supply - with a 13:2:2 turns ratio, assuming Dmax = 90% then you won't be able to generate more than about 55V at the output.

    I presume that the waveform is the transformer primary voltage - it seems to be running at 50kHz and seems ok to a first approximation. It shows that your power train is running ok although it is locked out at D max. This would tie in with your experience that the TL431 isn't reaching its regulation setpoint. I would concentrate on the TL431 circuit for now.

    One thing that you can do is to disable the UC3895 circuit completely - keep its Vcc at 0V for example. Then apply a voltage to the output of your PSU. Slowly increase this voltage and as it passes the control setpoint you should see the cathode of the TL431 change state from OFF (a high voltage) to LO (2.5V).

    It looks like there is significant voltage spikes on the waveform - These may be due to measurement technique or due to the PCB layout - You will have to find out what is causing them and correct them because they cause un-necessary stresses on the switching MOSFETs on both primary and secondary and will also increase the conducted EMI noise - but these are separate problems to the one you have where Vo isn't getting to its target.

    Regards
    Colin

  • 0 in reply to Colin Gillmor
    Prodigy 40 points

    Here is my design circuit diagram.

    But my ZVS effect is not obvious, transformer energy can not pass.

    I hope you can help me adjust the circuit parameters.
    I will be very grateful.

    PSFB_V2.pdf

  • 0 in reply to Leo HUANG
    TI__Mastermind 25570 points
    Hello Leo

    First off - I think your transformer turns ratio is not correct - you need 4.52:1:1 or 9:2:2 Np:Ns:Ns to achieve a 60V output at a reasonable duty cycle. Your existing 13:2:2 will achieve 60V only at 100% duty cycle which isn't realistic so the first thing I would do is change the turns ratio.

    The second thing is that the output sensing potential divider (R18, R21, R29) will give you a control setpoint of 57.5V assuming the TL431 is a 2.5V reference.

    The TL431 normally has a maximum cathode to anode voltage in the range of 36V or so - your circuit would put close to 60V (Vout - Vf of the optocoupler LED) on the cathode of the TL431 leading to its destruction. The easiest way to fix this is to place a zener diode in series with the optocoupler LED - 35V or so would be a reasonable value. I see the 30k R15 is in series with the LED and this will help but I would expect that transient conditions on Vout - when the TL431 tries to push close to zero current through the LED would lead to an over voltage condition on the TL431.

    The compensation network, C10, C12, R25, C13 seems a bit strange - it would be worthwhile double checking it.

    TI also makes gate driver ICs such as the UCC27714 which may be worth looking at, this may be a simpler approach than the isolated devices you are using also it's not clear how you are generating the VC and Vee supplies for these devices - of course the VC/Vee supply for ACPL1 (QA) must be separate from those supplying ACPL3 (QC). The VC/Vee supply for the two low side MOSFETs can be the same - but it is all very complex.

    Anyhow, first, fix the transformer - and let me know how you get on.

    Regards
    Colin
  • 0 in reply to Colin Gillmor
    Prodigy 40 points

    Hello Colin 

    First of all thank you very much for your help, I was too busy to reply instantly.

    This is my Mosfet signal, and my new circuit.

    You previously mentioned that the VC/Vee power supply for ACPL1 (QA) must be separated from the ACPL3 (QC) provided, but I can't change the hardware specification at present.

    And you mentioned that the feedback circuits of PC817 and TL431 were really problematic.

    But I couldn't find the relevant article, so I can't determine my value.

    Is there a formula to calculate the relevant value.

    3073.PSFB_V2.pdf

  • 0 in reply to Leo HUANG
    TI__Mastermind 25570 points

    Hello Leo - no problem with the delay - we all get busy from time to time, it's an unfortunate fact of life.

    Anyhow - The waveforms look ok - assuming that they are Ch1 = OUTA, Ch2 = OUTB, Ch3 = OUTC and Ch4 = OUTD. In your case the system is running at Dmax which is consistent with the transformer waveform in your first post.

    Voltage loop compensation using the TL431 is nicely explained in Ray Ridley's article at https://www.researchgate.net/publication/280308828_Designing_with_the_TL431_-_the_first_complete_analysis please have a look at it, I think it gives enough information to allow you to stabilise the loop. For now, I would not worry too much about getting the maximum bandwidth out of the system - that can come later - you could try to close the loop at 1kHz initially then work to increase it once you have the power stage running nicely - things like efficiency and unwanted noise spikes can be fixed without having a fast loop.

    I think that the VCC rails to the ACPLx drivers will have to be separated. When QA is on for example QC is off and the full input voltage will appear between the VCC rails for these two drivers. Maybe I misunderstand your circuit and I have not seen the isolated driver before - you could talk to the manufacturer of the device just to be sure on this.


    Regards
    Colin

  • 0 in reply to Colin Gillmor
    Prodigy 40 points

    Hello Colin
    First, thank you so much for your help.
    Due to the limitations of the experimental environment, I now want to test the functionality of the circuit in a low-power output.
    I designed the TL431 circuit with reference to the information you provided, but it seems that some pages cannot be opened.
    This is my circuit after adjustment, my transformer primary waveform.
    When my input power was at 20V and 6A, my capacitor C7 exploded.
    When I use a DC power supply, I don't know why my input voltage cannot rise and why my capacitor C7 will explode.PSFB.pdf