• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 63 subscribers
  • Views 1288 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65177: TPS65177 VGL loop stability

Robin Yu
Intellectual 2190 points
Part Number: TPS65177

Hi team,

For VGL of TPS65177, does it have the risk of instability, or it is stable naturally.

If it has the instability risk, please give the method of how to measure the loop stability.

If not, please give a simple instruction of the principle.

Great thanks.

  • 0
    TI__Expert 8010 points

    Hello Robin,

    Sorry for the delay.  The IC controls the external transistor (NPN) to regulate the negative charge pump. The reason for the external transistor is to reduce power dissipation in the IC.

    Sure every regulated system has an instability risks, if it is not operated as recommended. For this controller the minimum stability requirements are:

    • Gain (hFE) of NPN > 50 (recommended is 100) to ensure the minimum base current on DRVN
    • CO(effective) > 1µF
    • CFLY(effective) > 100 nF

    If you need to measure the loop stability the best (and easiest) approach is to measure the load-step response of the controller. This App Note will give you advises how you can estimate phase+margin with the load-step response.

    Best Regards.

    Ilona