BUF16821: Cannot write BUF16821 nonvolatile registers

Hello Ferenc,

Thanks for your request. We will take a look at it asap.

Best Regards.
ilona

Thanks Ilona.

I might be doing something wrong, the datasheet is not quite clear to me (latest version currently on the site). Checked the datasheet of other similar devices with nonvolatile memory, there is exactly the same text and image in them.

Text says:

Send a DAC/VCOM pointer address byte. Set bit
D7 = 0 and D6 = 0. Bits D5–D0 are the
DAC/VCOM address.

And in the image a some pages later:

DAC address pointer. D7-D0 must be 000.

This does not match, my logic says addressing is identical to reading/writing the volatile registers.

And the timing:

Is it expected to change the I2C clock frequency during the last byte? That's quite impossible with a hardware I2C/TWI controller. Or is this device employing clock stretching? (Somewhere it's written in the datasheet that SCL is input only so I guess not) I tried to set a very low speed that meets these requirements (although it's not very clear which edges are measured), but in my system it's not possible to go below 62500 Hz SCK frequency. The latest STOP condition can be delayed or completely removed, but that did not seem to help.

Any idea how to make it working would be welcome. Thanks.

Hello Ferenc,

Thank you for mentioning the inconsistency. We need to update the figure with D7-D5 must be 000. For all registers that can be written D5 is as well 0.

Which timing are you referring to?

Could you please send the data stream that you are sending to the device that I can check what is going wrong?

Best regards,
Brigitte

Hi Brigitte,

Thanks for your quick response.
I tried to copy the image into my reply but it did not go through. It's figure 13 on page 17 in the datasheet here: http://www.ti.com/lit/gpn/buf16821I'm talking about the t1>20us and 100us<t2<2ms requirements. They're not explained in the text, and from the image it's not clear to me how are they measured. However this timing does not seem to be possible with a hardware I2C controller. Hope that I'm wrong and there is a solution.

I believe this is the correct data stream to write 0x0123 to the NV memory for channel 5:

START
0xe8 (address +R/w=0)
0x05 (channel)
0x41 (data high + update/write flags)
0x23 (data low)
STOP

The BUF16821 acknowledges properly the address and data bytes. I can write any of the 18 volatile registers (with/without output update), read back all of them and the status registers too. General acquire works too. Everything seems to be working as advertised except updating the NV registers.

Hello Ferenc,

You data stream is the data stream for writing the NVM for channel 6.
To be 100% sure, I used MSP430F5529 with 100kHz and 400kHz to check it again and it worked properly.

Do you know if the BUF16821 acknowledges the I2C address?

I will check what the timing means.

Best regards,
Brigitte

Hi Brigitte,

In the docs channels are counted from 1 but addresses start at 0. Correct, 5 is for channel 6.

Yes the I2C address, channel address and both data bytes are acknowledged properly by the BUF16821. But the data is not written anywhere when bit 14 is set. After hundreds of attempts, MAXBANK is still zero.

So you're using plain I2C communication at 100/400kHz, no special timing? That's good news. I'll try with elevated supply voltage approaching 20V tomorrow afternoon, probably 13V is not enough. My hardware is a Smartfusion2 SoC FPGA using the hardware I2C interface, clock is either 62.5kHz or 234kHz.