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Original question:

TPS65642A: What's value of resistance between VGH and VGHM

TPS65642A: Question about Power -up Sequence VGHM is delayed to VGH, not same time

NY
Expert 3040 points
Part Number: TPS65642A

Hi Team, 

Customer experiments changing Capacitance value on VGH-VGHM, howerver no power up sequence changes. please advise me why this is no changes refer to the attachment.

Regards, Naoki yada

TPS65642A Questoins_20180516.xlsx

  • 0
    TI__Guru 58215 points
    Hello Naoki-san,

    There are 2 points that influence the VGHM startup. The internal delay from VGH to VGHM is set by the DLY6 register which is by default set to 20ms. You need to set this register to 0ms (0x00) to start VGHM directly when VGH is at the target value.

    In addition the FLK signal needs to be high to connect VGHM to VGH (turn on Q1 in Figure 5-9).

    I expect that the 54ms the customer is measuring are a combination of the DLY6 register and the FLK signal because the maximum delay that can be set with the register is 35ms.

    Best regards,
    Brigitte
  • 0 in reply to Brigitte
    TI__Expert 3040 points
    Hi Brigitte,
    So, after VGH started up, if FLK goes high, VGHM immediately started-up, correct?
    Regards, NY
  • 0 in reply to NY
    TI__Guru 58215 points
    Hello Yada-san,

    Please excuse the delayed response.
    If VGH has started, it depends on the setting of DLY6 register when VGHM goes high. See figure 4-60 in the datasheet for a 10ms delay.
    In this time, FLK can be high, but VGHM will not go high until DLY6 has passed.

    Best regards,
    Brigitte
  • 0 in reply to Brigitte
    Prodigy 20 points
    Hellow Brigitte-san,

    this is Kurioka @ sharp.
    I am the one who received Mr.Yada's introduction.

    thank you for your reply.

    In summary, in VGHM, VGH rises and rises after the set time of DLY6 and the FLK signal generation time.
    Is this recognition correct?

    Best regards,
    Y.Kurioka
  • 0 in reply to user5338547
    TI__Guru 58215 points

    Hello Kurioka-san,

    Please have a look at this figure:

    For this startup measurement FLK is high all the time. VGHM starts about 10ms after VGH reaches the set value because tDLY6 is set to 10ms.

    VGHM goes high after the following has happened:
    1. tDLY6 time has passed after VGH reached the set value.
    2. FLK is high.

    Maybe this text from the datasheet page 35 helps even more to understand the behavior:

    Best regards,

    Brigitte

  • 0 in reply to Brigitte
    Prodigy 20 points

    Hello Brigitte - san,

    thank you for the detailed explanation.

    I understood it.

    thank you.

    Best regards,

    Y.Kurioka