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TLC5940 not working at high speed CLK

Luis Afonso
Guru 20670 points
Other Parts Discussed in Thread: TLC5940

So i don't even know if i should post this in the MCU forum or here but i'll start here.

I am trying to use a TLC5940 to control a big RGB matriz. Problem is i need to do some multiplexing to avoid using an enormous number of drivers. This requires high speed updating. This should not be a problem with the TLC5940 working at up to 30MHz.

I am using a Tiva, lm4c1294 to control the TLC5940. I am using the same PWM output for the GSCLK and the SCLK.(serial clock). Also i am toggling the BLANK at the 256th step for higher speed and lower resolution. When i need to load data i simply start at the 256-193 step and then istead of just toggling the BLANK i do the right process of loading data by togling XLAT while BLANK is high.

Ok so, here is the problem. I have this working at 400Khz. When i try to get over that, the ports just all turn to the max and some even stay at 0. Is there sometigh i am missing? The Tiva i am using should make this a cake walk at speeds up to 1Mhz

  • 0
    TI__Intellectual 1820 points

    Hello,

    It's better to understand your problem if you can share sch and waveform(SIN/SCLK/XLAT/BLANK/GSCLK).

    What's your meaning of " i am toggling the BLANK at the 256th step for higher speed and lower resolution"? One display period of 5940 is 4096 GSCLK, do you mean that you only input 256 GSCLK, then toggle BLANK?

    What's your multiplexing ratio? Had you initialized DC register? If you choose EEPROM as DC data source, then may be not needed for initialization, since EEPROM default to all '1' when power on.

    When you say " I have this working at 400Khz", what's the meaning?

    I can't help you unless I well understand your problem.

    Mike

  • 0 in reply to Mike(DC/DC) Wang
    Guru 20670 points

    Sorry by taking so long to respond.

    Right now i don't have access to a osciloscope to show them.

    For  " i am toggling the BLANK at the 256th step for higher speed and lower resolution", i mean only input 256 GSCLK then toggle BLANK, yes

    I still don't have a ratio for multiplexing ratio, it depends on the speed i can achieve with the GSCLK and SCLK. I never initalize the DC register.

    I mean i have the GSCLK and SCLK (i have them join together) at 400Khz, i want it at higher speeds.

    My problem is i can't increase the CLK over 400Khz without having the TLC5940 outputs all stay high without changing. 

  • 0 in reply to Luis Afonso
    Guru 20670 points

    unfortunately i don't know how to get into the computer the osciloscope/logic analyzer data and there's isn't anyone here (literaly) that knows how to do it.

    GSCLK at 1Mhz:

    Rising time 54ns

    Falling time 55ns

    XLAT:

    Positive pulse width of 10ns

    Rising time of 24ns

    Falling time of 40ns

    BLANK

    Positive pulse width of 33ns

    Rising time of 7ns

    Falling time of 47ns

    But there are problems or possible problems i found:

    XLAT is toggling with a pulse of 10ns. This happens at all speeds.

    XLAT falling edge is just 14ns from BLANK falling edge.

    Both XLAT and BLANK altough in the logic analizer they look ok for TTL, in the osciloscope they of course show signal of the capacitance of the GPIO

  • 0 in reply to Luis Afonso
    Guru 20670 points

    Here is a image from my phone of the logic analyzer. Maybe it will help.

  • 0 in reply to Luis Afonso
    TI__Intellectual 950 points

    Hi Luis,

    I am afraid I can't get useful information from your image. I hope you can double check the parameter in the following table to make sure all of them are in the corret range.

    Thanks,

    Rosley

  • 0 in reply to Rosley Ge
    Guru 20670 points

    I'm sorry, I know the quality of the image isn't very good and also lacks info.

    I didn't check all the times thoroughly. Didn't have the analyzer for long enough. 

    Gona check if that analyzer is capable of conecting to the computer so i can provide beter information

  • 0 in reply to Rosley Ge
    Guru 20670 points

    I've been cleaning up some bugs like, the 2 CLK not being low when i pulse XLAT and BLANK, i have a doubt.

    From XLAT falling edge to BLANK falling edge i have just 5ns, would that be some problem?

    Also XLAT is about 27ns long, is this to close to the value in the table, to the point it causes problems?

  • 0 in reply to Luis Afonso
    Guru 20670 points

    Well, i found out the problem, it seems that everytigh was right, but the control method had 1 problem. it always needed sometigh like 1uS each bit. This would make it impossible to have high CLK and GSCLK.

    Now i decided to use the MCU dedicated SSI module and now it all works at 30MHz with no problems. Great driver!