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LM3409 Coff calculation while parallel dimming

Rens Kessener
Prodigy 70 points
Other Parts Discussed in Thread: LM3409HV, LM3409

LM3409HV

 

Hello all,

 

I am designing a device using 4 LM3409, controlling a RGBW (Ledengin LZ400MD00) led.
Led current approx. 1A.
I want to use PWM dimming as well as analog dimming.

The latter is used for 2 reasons

-          led-protection for the case its temperature is going out of control because the cooling medium (water) is gone. (yes I do measure the ledtemperature).

-          To decrease the intensity of the led for the case the device runs in the dark and may blind the observer. (the device should work in daylight as well which needs much more light).

PWM dimming is done at a frequency of about 350 Khz ( 64 steps.).

(You may think that is ridiculous high, because our human eye is not able to see it, but believe me, in this application you can.)

That is why I have choosen to use parallel dimming.
When no light is to be emitted for a particular colour, EN pin will be pulled low.

For the time being I will only use one led, but in the future I would like to use a set of leds in series, and I am trying to make the same board suitable for that as well, possibly without changing components.

So the LM3409 could be used at Vin voltages from 12 to 50 V depending om the number of leds in series..

I use the schematics as in the datasheet, only the component values are adapted to my application.

 

Questions:

1)       In the datasheet the Coff and Roff circuit is connected to V0. One of the reasons, I understand, is that the Vo varies with the current through the led, and will influence COFT.
Is there another reason?



However, when using multiple led’s in series, V0 changes and consequently Roff.
If Roff would be connected to another fixed voltage (e.g.11 V that is available on the board anyhow for other reasons), there is a real fixed Toff, that is not dependant on V0.
Is this true? What disadvantages are there

2)       The circuit to prevent max Toff I don’t understand.
I assume Vo and VDD both >> 1.24 V.
If the DimFET shortens the LED, Vo = Lled*RDS(on). (say 0,3V). Diode is not conducting,
COFF would be charged by VDD and Toff depends on Roff2 only (fsw >>fdim).
If DimFET is open, Vo = Vled(fw). COFF would be charged partly by Vo, partly by VDD, dependent on the ratio of VDD and Vo. Hence TOFF depends on both Vo and VDD.



I cannot figure out how Roff2 is calculated, nor do I understand that any voltage for VDD > 2V is appropriate.
Do I miss something? Can anybody explain?

3)      Indeed, when using parallel dimming requires measures during shorting the led.
What circuit could I use to get proper TOFF during close/open DimFET?
Or would my suggestion in 1) work?

 

Thanks in advance.

LM3409HV
 
Hello all,
 
I am designing a device using  4  LM3409, controlling a RGBW (Ledengin LZ400MD00) led.
Led current approx. 1A.
I want to use PWM dimming as well as analog dimming.
The latter is used for 2 reasons

-          led-protection for the case its temperature is going out of control because the cooling medium (water) is gone. (yes I do measure the ledtemperature).

-          To decrease the intensity of the led for the case the device runs in the dark and may blind the observer. (the device should work in daylight as well which needs much more light).

PWM dimming is done at a frequency of about 350 Khz ( 64 steps.).
(You may think that is ridiculous high, because our human eye is not able to see it, but believe me, in this application you can.)
That is why I have choosen to use parallel dimming.
When no light is to be emitted for a particular colour, EN pin will be pulled low.
For the time being I will only use one led, but in the future I would like to use a set of leds in series, and  I am trying to make the same board suitable for that as well, possibly without changing components.
So the LM3409 could  be used at Vin voltages from 12 to 50 V depending om the number of leds in series..
I use the schematics as in the datasheet, only the component values are adapted to my application.
 
Questions:

1)       In the datasheet the Coff and Roff circuit is connected to V0. One of the reasons, I understand, is that the Vo varies with the current through the led, and will influence COFT.
Is there another reason?
However, when using multiple led’s in series, V0 changes and consequently Roff.
If Roff would be connected to another fixed voltage (e.g.11 V that is available on the board anyhow for other reasons), there is a real fixed Toff, that is not dependant on V0.
Is this true? What disadvantages are there?


 

 

2)       The circuit to prevent  max Toff I don’t understand.
I assume Vo and VDD both >> 1.24 V.
If the DimFET shortens the LED, Vo = Lled*RDS(on). (say 0,3V). Diode is not conducting,
COFF would be charged by VDD and Toff depends on Roff2 only (fsw >>fdim).
If DimFET is open, Vo = Vled(fw). COFF would be charged partly by Vo, partly by  VDD, dependent on the ratio of VDD and Vo. Hence TOFF depends on both Vo and VDD.
I cannot figure out how Roff2 is calculated, not do I understand that any voltage for VDD > 2V is appropriate.
Do I miss something? Can anybody explain?

3)      Indeed, when using parallel dimming requires measures during shorting the led.
What circuit could I use to get proper TOFF during close/open DimFET?
Or would my suggestion in 1) work?

 
Thanks in advance.
  • TI__Mastermind 25500 points

    350kHz is very fast, it will be hard to get decent linearity at that speed for any regulator. But shunt FET dimming is pretty much the only way to get even close. So to answer your questions:

    1. Connecting Roff to Vout helps to keep a pseudo fixed switching frequency versus variations in output voltage. This could be the LED Vf varying with current or temperature, or it could be different LED stack voltages. As you increase the output voltage the off time will get shorter and the on time will get longer resulting in a higher duty cycle and about the same switching frequency. Connecting it to another non varying source will just cause the switching frequency to vary with output voltage. If you go from 1 LED to 2 LEDs you will nearly double the switching frequency in that case. So you can use another source, but you will probably want to change Roff for different LED stacks at least to keep the switching frequency reasonable.

    2. The purpose of the circuit it to provide something to charge COFF when the FET is shunting the LEDs. Ideally you want to keep it switching when the shunt FET is on (I'm not sure if that's possible at 350kHz PWM dim). But the diode will be conducting. The point of shunt FET dimming is to keep the inductor current regulated so when the FET is turned off all of that current is already flowing and you get a very fast current rise time in the LED. You would calculate the off time for the external source the same as for Vout but using the external voltage in the equation. With such a fast PWM frequency you will probably want to calculate the off time for the external source so that you will get a similar switching frequency with the FET on as you do with it off. You will be in minimum on time mode during the FET on time so you can calculate the toff that way. The reason VDD>2V is suggested is the COFF threshold is 1.24V and you need a source high enough to charge it beyond that threshold after a diode drop.

    3. I believe that is covered in #2.

  • in reply to Clinton Jensen
    Prodigy 70 points

    Dear Clinton,

    Thank you, I have got the message and understand it.

    Yes, 350Khz is high. I have done it before using a SOC with special led-drivers incorporated, but the processor is too small.

    I will change the components when using the board for a ledstring.

    I have attached an excell sheet to calculate values.

    That looks Ok to me.

    You would do me a favor to check it as well (Formulas I have checked twice)

    Best regards

    Rens

    LM3409 rekenarij-2.xlsx

  • in reply to Rens Kessener
    Prodigy 70 points

    I didn't include the proper calculation of Roff2 in the sheet.

    Attached is the correct sheet.

    Sorry for the inconvenience.

    RensLM3409 rekenarij-2a.xlsx

  • in reply to Rens Kessener
    TI__Mastermind 25500 points

    The spreadsheet looks good. I have just two comments:

    1. You may want more input capacitance than the calculated minimum since you are PWM dimming. I would at least double it to be safe.

    2. The VDD you are using for the off timer is higher than the actual LED voltage in most cases so it's like tying it to a static voltage anyway. So you could just tie it to 3.3V without all the extra components. Ideally you would want it to be lower than the LED voltage, maybe you could add another diode drop in series. The reason is that if you have it running off a static voltage your switching frequency may get very high during PWM dimming. You want that second source to be used only when the shunt FET is on so that you can set a significantly longer off time so that the switching frequency does not go too high.

  • in reply to Clinton Jensen
    Prodigy 70 points
    Thanks a lot. It helps

    Rens
  • in reply to Rens Kessener
    Prodigy 70 points

    Hello Clinton,

    In the mean time I have made a set of  PCBs  that includes 4 LM3409HV chips for RGBW colours, parallel dimming as well as analog dimming.

    As explained before, the analog dimming is used for overall intensity of all 4 leds simultaneously.

    Therefor I made a DAC that can vary the voltage between 0 (never used) and 1.24V over a resistor of 1K.

    The output of the DAC is connected to all 4 leddivers's Vadj-pins.

    AND THAT APPEARS TO BE A PROBLEM.

    As explained before, the intention is also to switch off the driver,  using the EN-pin,  when the led is not emitting light.

    However, when the EN-pin is pulled low, the Iadj circuit is not working any more. It draws much more current and the voltage is pulled to approx 0.3 V.

    That means, when 1 driver is switched off by EN-pin, all 4 drivers are analog-wise dimmed as well, and that is not what I need.

    To bypass that I need to switch off the led using the parallel dim-fet. That means, when the led is off, that fet caries all current.

    Unfortunately, I did not find any description of that effect in the datasheet.

    The only thing I found is:

    EN Logic level enable / Apply a voltage >1.74 V to enable device, a PWM signal to dim, PWM dimming or a voltage <0.5V for LOW-POWER-SHUTDOWN. (page 3)

    and

    The enable pin (EN) is a TTL compatible input for PWM dimming of the LED. A logic low (below 0.5V) at EN will

    disable the internal driver and shut off the current flow to the LED array. While the EN pin is in a logic low state

    the support circuitry (driver, bandgap, VCC regulator) REMAINS ACTIVE  to minimize the time needed to turn the LED

    array back on when the EN pin sees a logic high (above 1.74 V). (page 16)

     

    The consequence of all this is that I have to change my PCB's and add circuitry to prevent that effect or to use 4 seperate DACs, one for each colour.

     

    Do you know of that effect? and should I have found it myself?

    Do you have any other sugestions to solve this wihout making all PCB's anew?

     

    Thanks in advance

     

    Rens

  • in reply to Rens Kessener
    TI__Mastermind 25500 points

    That is not an issue I'm aware of, but I could see ADJ pulling down eventually. The device does remain active but only for as long as VCC has not discharged below its UVLO level. After VCC discharges it goes into low power shutdown mode. But you could try two things:

    1. Put some series resistance to each ADJ pin so that it does not pull down on the others.

    2. Use the UVLO pin for PWM dimming. If you are using the UVLO function you can use a diode (anode to UVLO pin, cathode to your PWM signal) and it behaves exactly like the EN pin for PWM dimming but VCC remains active and will not discharge. EN should really only be used when you need a low power shutdown mode.

    So if you are shunt FET dimming why would you need to pull EN low in the first place? The point of shunt FET dimming is to keep the regulator active and the inductor current at regulation level so that when the FET is turned off the LED current rise time is very fast.

  • in reply to Clinton Jensen
    Prodigy 70 points

    Hello Clinton,

    Thanks for your quick reply.

    I use shunt dimming because the required dimming frequency of 350 Khz and that cannot be done by EN dimming.
    When a led is switched on to any output level, the very first rise time in not critical, but the PWM frequency is.
    But when the leds are off it means that the shunt-fet is carrying full current.
    The MCU, that controlls the device can switch off the led driver when the led is not emitting light.
    For that I used the EN causing the artifact.

    So, if I undersand you correctly, I could use the UVLO (with diode as you describe) as EN as well, without having the artifact, and keep EN high all the time?
    (there is no need to put the driver in low power mode)

    I also will try the other suggestion of a series resistor to each Vadj pin.

    Best regards

    Rens

  • in reply to Rens Kessener
    TI__Mastermind 25500 points

    I'm betting the ADJ pulldown is likely due to the low power shutdown. So if the resistors don't work well enough, or if you prefer the method, using UVLO should work as it does not put the device in that mode and the current source pullup remains active.