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LM3409HV: Output pulse delay

Ramiro palacios
Intellectual 545 points
Part Number: LM3409HV
Other Parts Discussed in Thread: LM3409

Hi all

I have a design of a circuit with LM3409. It has one LM3409 and the rest of the design is the same as Manual recomendations.. The output of LM3409 is connected to 2 led string in pàrallel of 3 leds each.

My input and output I-V data are 12 V nominal input, 9 V nominal output, 2 A average led current per string, , 525000 Hz frecuency....

Also, I have an strobing pulse connected to EN pin. This pulse is 1000us long, and 25 Hz.

I have calculated the components values and the spice circuit is as follows:

My problem is that I have a delay in the rising up of the output pulse comparing with ENABLE pulse. You can see it in the graph below. The output pulse (yellow) does not follow EN pulse (pink). The output pulse rise up 300 us after the rise edge of EN pulse, and ends on time, so the output pulse long only 700 us aprox, not 1000 us as enable pulse. And I do not know why the rising edge has such delay. 

Why such a delay is obtained in the output pulse? Any Idea

best regards

  • 0
    TI__Mastermind 25500 points

    Hello Ramiro,

    Yes, the device is going into low power shutdown mode because VCC has enough time to discharge low enough each cycle at 25Hz.

    You can prevent this delay by using the UVLO pin rather than the EN pin. It behaves the same way except VCC will not discharge and the device will not go into low power shutdown mode. That will get rid of the delay. You can diode OR the PWM signal to the UVLO pin if you still want to use the UVLO function with the resistors (anode to UVLO, PWM signal to cathode).

    Regards,

    Clint

  • 0 in reply to Clinton Jensen
    Intellectual 545 points
    Hi Clinton

    I do not know exactly what you mean. DO you mean just add a diode between EN and UVLO? that's it? Is it ok the rest of the circuit (UVLO resistor included?)

    Is there any other way to avoid this without modifying the layout?
  • 0 in reply to Ramiro palacios
    TI__Mastermind 25500 points

    Hello Ramiro,

    The overall circuit looks fine. But by a diode I meant between your PWM signal (the one you are applying to EN right now) would go through a diode to UVLO. When the signal is low the diode pulls UVLO down and when it is high the diode is reverse biased and UVLO goes high. A FET from the UVLO pin to ground would work also with an inverted PWM signal. In this case you just tie the EN pin high unless you want to shut the device down completely.

    If you aren't even concerned about the UVLO function, for instance you know EN or UVLO will be low until the full input voltage is applied, then you can just drive UVLO directly just like you are doing with EN now.

    I'm not sure it can be done without some small layout modification. But you can do an easy cluge to test it out and see how the delays are gone.

    Regards,

    Clint