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LM3423-Q1: level shifting circuit

David Park
Expert 5440 points
Part Number: LM3423-Q1
Other Parts Discussed in Thread: LM3423

Hi,

In LM3423 datasheet, Figure 27, There is level shifting circuit for PMOS dimming.

Vcc is connected to Q6 and it seems to be enable dimming when IC turns on.

Is it correct?

With this circuit, there is current peak at start of dimming.

When removing Q6 and short emmiter to collector, current is flat during dimming on.

Then, could you let me know what the expected problem is?

Thanks.

  • 0
    TI__Mastermind 25500 points

    Hello David,

    If conditions are right it may be fine to remove Q6 and short C to E and Q6 will introduce some delay which is why you may see a little overshoot. But under many conditions removing Q6 could be a bad idea.

    Q6 is there to act as a current source to bias the 10V zener. When DDRV pulls low it biases the zener and gives you a known 10V gate voltage. When DDRV goes high the source turns off and the 100pF capacitor charges and the FET shuts off, again with a known gate voltage. Directly connecting is will give you an unknown gate voltage each cycle. If the frequency is high enough you may not notice it and it might be ok, but the reality of it is depending on Vo you may never fully turn the FET off in some cases, and when it is on you may exceed the current rating of the zener and damage it. Also without it you will not know for sure what the 100pF may charge to and over time it could turn the FET off when you want it on.

    You may be able to reduce the delay and peaking by reducing the 10k resistor, but make sure that VCC/R doesn't exceed the zener diode's current rating.

    Regards,

    Clint