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LP8863-Q1: About SPI interface

Tsukui Yusuke
Guru 21930 points
Part Number: LP8863-Q1

Hi,

Could you tell me about LP8863-Q1 SPI interface.

1.When selecting SPI communication,
   Connect all CLK / DI / DO / CS in parallel.
   Is this correct?
   Please tell me the connection example.

2.When SPI is selected,
   Each IC control is controlled by the CS Pin.
   Is this correct?

3.When using multiple LP8863-Q1,
   Is there a limit on the maximum number of connected ICs in SPI mode?

Best Regards,
Yusuke/Japan Disty

  • 0
    Prodigy 30 points
    Hi Yusuke,
    You're basically just need answers to the SPI bus and nothing to do with the LP8863 per say.
    1. corrent. DI goes to your masters DO pin, DO goes to the masters DI pin, CLK and CS go to the same pin on the master.
    2. yes, CS should be low. However, if you only have one SPI chip you can maybe just ground the pin.
    3. not sure but I'm would guess more then 10.
  • 0
    TI__Intellectual 1235 points
    Yusuke-san,

    Thank you for reaching out. Please find below the answers to your questions:
    1. You (and Lee Davis39) are correct.
    2. Yes that is correct and as it is shown Fig 1 (SPI Timing Diagram, datasheet) the transmission happens when SS is grounded.
    3. Well, you need one chip/slave select per IC and it depends on the bus capacitance. Usually as you add more devices that adds Cbus which eventually limits your speed( but that’s same for any SPI devices)

    Kind Regards,

    David D Quintana