I am looking for some sort of design lines documentation that explains how to connect ldo to fpga shold it be with filters what kind of filters or should i use bead's if i have to line's that sharing tha same volltage?
I spoke with aletra application ENG they suggested me to ask ti on this issue .
On this page:
in the "Power & Analog for Processors and FPGA's" section, you will find complete reference designs for your Altera device.
Hope this helps
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