how to reduce the output noise level of LDO regulator and sampled noise of ADC?

shuaibing wu

Other Parts Discussed in Thread: TPS54332, TLV1117, TPS717

later, I used TPS54332+TLV1117-33 as the power module of analog part on the DSP board . The schematic is shown fig. 1 in attached pdf file. The input voltage of TPS54332 is 12VDC, output voltage is 5VDC connected to input of TLV1117-33. The noise and ripple of TPS54332+TLV1117-33 are shown fig. 2 and fig. 3 in attached pdf file, respectively. At last, I show the noise in ADC input pin as fig. 4 in attached pdf file. The measured noise in ADC input is agree with the sampled noise of the ADC.

Now, my question is how to how to reduce the sampled noise of the ADC. In addition, What is the relationship between sampled noise and regulator output noise?

best regards.

Attachment.pdf

over 8 years ago

0 Ron Michallick over 8 years ago

TI__Guru*** 140026 points

Shuaibing,

Is the 3.3V supply going to the ADC input channel or the ADC reference input?

0 Xavier Ramus over 8 years ago

TI__Expert 4950 points

Hello Shuaibing,

To answer your question, we have to consider what type of ADC you are using and the speed of the data acquisition as the ADC power suppyl pin will have different characteristics.

In general, a low noise power supply for an ADC consists of the DC/DC converter, a low noise LDO followed by a pi-filter (ferrite bead + distributed ADC power supply bypass capacitors.

The DC/DC converter has 2 main sources of noise (ripple noise and flicker/thermal noise). Both sources of noise will be attenuated by the LDO PSRR, the pi-filter and the ADC PSRR.

In your case, the first step would be to replace the TLV1117 with a lower noise LDO such as the TPS717 or the TPS747. You would then have to insert a series ferrite bead after the LDO. This ferrite bead, with the ADC bypass capacitor, will form a pi-filter that will further attenuate the ripple noise but more importantly bandlimit both the flicker and the wideband noise originating in the LDO. You then can trade -off the LDO performance with that of the rest of the power chain to the ADC pin.

The following blog series can help you develop the power supply spec that will ensure that the ADC power supply is not the limiting factor in your data acquisition.

https://e2e.ti.com/blogs_/b/powerhouse/archive/2015/01/24/measuring-psrr-in-an-adc

https://e2e.ti.com/blogs_/b/powerhouse/archive/2015/02/18/adc-power-supply-rejection-calculating-allowed-supply-ripple

https://e2e.ti.com/blogs_/b/powerhouse/archive/2015/03/03/measuring-noise-requirements-for-adc-power-supplies

https://e2e.ti.com/blogs_/b/powerhouse/archive/2015/04/14/noise-requirements-for-adc-power-supplies-

Best regards,
Xavier

0 shuaibing wu over 8 years ago in reply to Ron Michallick

Prodigy 40 points

Hi, Ronald

The 3.3V supply is not going to either of ADC input channel and the ADC reference input. the ADC input channel is connected to ground, the ADC reference is generated by itself.

best regards

Shuaibing

0 shuaibing wu over 8 years ago in reply to Xavier Ramus

Prodigy 40 points

Hi Xavier,
Thank you for your reply.
The ADC chip is AD73311 from ADI，its data acquisition is 16 bit.

best regards

Shuaibing

0 Ron Michallick over 8 years ago in reply to shuaibing wu

TI__Guru*** 140026 points

Shuaibing,

Noise can also be introduced at the AD73311 power supply and ground pins.
To reduce the noise, it is important to know how the noise gets into the ADC result.

0 shuaibing wu over 8 years ago in reply to Ron Michallick

Prodigy 40 points

Ronald，
I don't know how the noise gets to the ADC result . I gets the digital signal as the ADC input connected to ground. how can I get the noise resource, power supply or ground?

best regards,
Shuaibing

0 Ron Michallick over 8 years ago in reply to shuaibing wu

TI__Guru*** 140026 points

Shuaibing,

You may try adding capacitance to the supply pins to see if that changes the signal.
Alternatively you could try a different 3.3V voltage source for the ADC to see if that was the issue..

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how to reduce the output noise level of LDO regulator and sampled noise of ADC?