• Resolved

TPS7A7001: LDO has short at input after 3 days of operation

Part Number: TPS7A7001

Dear Sir or Madam,

we use several TPS7A7001 in parallel. Each with Cin=10uF, Cout=10uF+4.7uF, giving a total of Cin=150uF.
VIN=5V5, VOUT=between 3V and 5V0.
After three days of operation (VIN from HMP4040) and RLOAD=open, the DC input resistance is around 20 Ohm or less. 
A PDF file with more details is available here: 
This happened to three PCBs of the same type and we have similar problems with LDK130M-R from ST.
Do you have any idea? Stability, cap size ?
The PCB is for power supply of a satellite radar system.
 
Best regards,
mh_
 
  • I am unable to access your PDF.  Please follow the instructions to attach a file as described here.

    Please be sure to include a schematic, any scope shots that may help show the issue, and the output current.

    Very Respectfully,

    Ryan

  • In reply to Ryan Eslinger:

    Hi Ryan, added the file - hope it works!
  • In reply to mh_:

    Yes the file uploaded correctly. Unfortunately the file does not include information that I can use to help you debug.

    You say that you are paralleling 10 TPS7A7001 devices; however, I do not see a schematic showing how these are connected in parallel. The following TI Design discusses a method to correctly parallel LDO outputs: www.ti.com/.../tidu421.pdf

    Could you provide a schematic showing how the LDOs are used in parallel? Also, what is the intended output current?

    Very Respectfully,
    Ryan
  • In reply to Ryan Eslinger:

    Hello Ryan,

    sorry, paralleling is the wrong word.

    All these LDOs provdide individual voltages with current consumption (below 0.5A) but all take the same input voltage.

    For some reason, all or some of the LDOs now have very low DC input resistance. As all the LDO inputs are in parallel, it is hard to say which one it is.

    Thanks for any idea. Our development is on hold, till this problem is solved.

    Thank you.

  • In reply to mh_:

    We do not ohm our LDO's from one pin to another in order to determine functionality. There can be many different circuits connected to these pins internally, such as the ESD protection circuits which include resistors and diodes and that will dominate the resistance measurements made when the device is off even though they have very little to do with the normal operation of the device.

    For us to help debug more information is required. Typically scopeshots and voltage measurements of input voltage, output voltage, and output current for each LDO is required to fully debug a system.

    Very Respectfully,
    Ryan
  • In reply to Ryan Eslinger:

    Hello Ryan,

    as the LDOs have become low-ohm after a few days/hours of operation. I can no longer turn them on.

    May be we can start from a different point:: Could you please screen the schematic in my PDF. The caps, the poti, ... one more 4.7uF cap is placed at the output.

    Anything wrong with that. We need to solve this problem. Right now, the only chance is to try different LDOs.

  • In reply to mh_:

    It looks like you are using the Typical Application schematic from the datasheet. I do not see an issue with the schematic as provided.

    Very Respectfully,
    Ryan
  • In reply to Ryan Eslinger:

    ... yes, but something needs to be wrong. 

    #1) If the caps and their ESR do not lead to instability and failure

    #2) If the resistor values, also from the Potis are all safe

    then: what else could it be ?

    Shall we change the LDOs ? 

  • In reply to mh_:

    One of my colleagues thought it could be due to a missing Schottky diode from output to input.

    www.e-devices.ricoh.co.jp/.../reverse.html

    If the output capacitor is charged and the HAMEG supply is turned on. The output cap will put current through R1, R2 and lead to Vout > Vin.
    Would this be a problem for your LDO ?