This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LP38798: Increasing ripple voltage over two LDOs

Part Number: LP38798

Hey Guys,

I'm in the end phase of my master theasis and have a problem with my power management. From a 19 V power adapter I wanted to go in three streps to a ripple free voltage for an ADC and DAC, but the voltage ripple increased and I have no idea why. I think the PDF is self interpretative. I left comments at the measuring points. By the way, from Webbench, I got an ripple in uV at the end of the chain. I hope someone can tell me what my fault was? Thanks in advice.

Problem.pdf

1172.Schematic.pdf

For private messages use S0539403@htw-berlin.de

  • Hi Christian,

    Your pdf only provides very limited information. In order to give any suggestions, I would need you to share your schematic as well.

    Regards,
    Jason
  • Is the schematic all u need? Hesitate not to ask if you need more information/description.
  • Hi Christian,

    Schematic is what I need to start my evaluation. If I need more information, I will let you know.

    Regards,
    Jason
  • Hi Jason,

    do you have good information for me? Or have I made any fatal mistake?

    Regards,

    Christian

  • Hi Christian,

    I got your schematic now. Sorry for the delay due to US holiday. I am currently reviewing your schematic, will get back to you soon.

    Regards,
    Jason
  • Hi Christian,

    I have reviewed your LP38798s in your schematic, a few comments here:

    1. Your second stage has a Vin = 6.1V and Vout = 5.677V, you have 421mV headroom for your LDO which is enough; but your 3rd stage only has a headroom of 397mV, the LDO could run into dropout. The datasheet dropout max spec at 800mA is 420mV.
    2. I am not sure what resistors you used, if you concern about accuracy, consider using 0.1% accuracy resistor.
    3. Consider increase the size of your input and output capacitors. The datasheet recommends minimum 1uF input capacitance and 10uF output capacitance; your 1uF cap and 10uF may not provide enough capacitance at the voltage you use the capacitors, check the datasheet of the capacitors.

    Regards,
    Jason Song
  • Hi Jason,
    Can it be that I draw too little current from the controllers and it rushes? Your other points I have all considered, but I examine, with an ordered evaluation board the capacitor dependency. Before I later soldered to the PCB.
    Thank you for your advice, now I know there is no general problem in my work. I write, if I solved the issue.
    Regards,
    Chris
  • Hi Jason,

    Today came the LP38798EVM Evaluation Board for round 50 €. I did some tests, with bad results. Also the problem is not my layout and a too small capacity and also the little headroom. I tested Vin from 6 V to over 15 V nothing changed. There are more then enough capacities installed. In sum 11 µF for input and 20 µF for output.
    The test below was with 300 mA load and Vin ~6,3 V. I used a PicoScope2205MSO to capture the signals with resolution of 12 bits.

    Here is a Webench calculation example with inaccessible values. Here are only the caps placed which are also used in my design.

    Input ripple at 100 kHz with 65 mV and output 21 µV. Ok thats the best op point, but why does the device in my case increase the ripple? I have no idea.

    I think the device, can't be titled as ultra-low-noise and high-PSRR.

    Regards,

    Chris

  • HI Chris,

    The PicoScope2205MSO  you referring to only has a 8bits resolutions, do you have other instruments you can try to collect the data?

    Regards, 
    Jason