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TPS731: Output voltage does not rise issue

Part Number: TPS731

Hi,

There was a problem that TPS73101 did not start up due to customer's evaluation.
I attach the waveform at the time of problem occurrence.
And customer's circuit is below.
TPS73101DBVRG4.pdf



When input voltage ON/OFF repeated, This phenomenon occurs.
Could you tell me the reason why the output voltage does not start up?
Does the TPS73101 have a protection function that turns off the output?

Best Regards,
Yusuke/Japan Disty

  • Hi Yusuke,

    From your description you say that the phenomenon occurs after the LDO is cycled ON/OFF multiple times. Do you ever see this phenomenon during the initial startup? Does the phenomenon occur everytime that the LDO is cycled ON/OFF multiple times?

    Could you provide a scope shot that shows the initial OFF/ON transition as well as ON/OFF and the next OFF/ON/OFF transitions?

    Very Respectfully,
    Ryan
  • Ryan-san,

    Thank you for your response.
    I am currently in the process of confirming with the my customer about your question.

    Incidentally,
    Is there a possibility that the output voltage will latch OFF?

    Best Regards,
    Yusuke/Japan Disty

  • Hi Yusuke-san,

    Yes, if the output is pulled negative before the LDO is enabled the foldback current can prevent the LDO from starting up.  This most commonly occurs in applications that have both a positive and negative voltage supply.  In these applications, if the negative LDO is enabled first, the positive output can be pulled negative preventing it from starting up properly.  In order to prevent this, we recommend that the positive LDO be enabled first.

    Very Respectfully,

    Ryan

  • Ryan-san,

    Thank you for your kind support.
    I understood your explanation.
    I will report the suspected over current limit in OUT pin negative condition to the customer.

    Do you ever see this phenomenon during the initial startup?
    →Yes.

    Does the phenomenon occur everytime that the LDO is cycled ON/OFF multiple times?
    →Yes. However, it is not frequent.

    Could you provide a scope shot that shows the initial OFF/ON transition as well as ON/OFF and the next OFF/ON/OFF transitions?
    →I will attach the customer's waveform.
     ・ON/OFF cycle is 0.1 ~ 1sec (AC adapter insertion-pull out test)
        ・AC adapter →DCDC→TPS73101
        ・Always occurs in the condition of Vin=0.6V, Vout < -1.5V.

       


    Best Regards,
    Yusuke/Japan Disty

  • Hi Ryan-san,

    Thank you for your support.
    Based on your advice, the customer has taken the following measures.

    1.Negative voltage at start-up was suppressed to -100mV.
    2.Timing of turning ON EN is shifted.
     (After the input voltage reached 5V, the sequence was set to turn on EN.)

    Normal startup was possible by these two methods.
    About this measure I got an additional question from the customer.

    ◇What voltage should be the voltage of Vin at the timing of turning ON EN?
     It was not possible to start with just the countermeasure of "1".

    Could you give me your advice?

    Best Regards,
    Yusuke/Japan Disty

  • Hi Yusuke-san,

    You should be able to startup with countermeasure 1 alone as long as the input rail for the LDO is not in current limit itself. There is no time requirement for Vin to enable being applied.

    Very Respectfully,
    Ryan