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LM5122 current sense issue

Other Parts Discussed in Thread: LM5122, PMP9258, SN74LVC1G04

Hi,

I currently implement a circuit using the LM5122, mostly like the circuit shown at page 39, Fig. 40 in the datasheet. Input voltage is 20-30V, Vin, CSP and CSN were specified for 75V, so this shouldnt be a problem.

I double checked CSP and CSN, no they were not connected wrong (reversed or so).

The circuit doesnt work, and the two 100 ohm resistors forming a filter together with 100p at the CSP and CSN inputs burning away!!

My sense resistor is 6.8mohm (measured) and connected with a 4 wire scheme to get correct readings for the current.

This happens on two boards.

Any idea?

With best regards

Gerhard

  • Hi 

    Input impedance of CSP/CSN pin is very high and normally the maximum voltage from CSP and CSN is limited to about 75mV. Please check the voltage between CSP and CSN, it should be within +/- 0.3V. 

    TI provides Synchronous Flyback reference design using LM5122 at http://www.ti.com/tool/pmp9258. Please refer this. 

    Regards,

  • Hi,

    I know document PMP9258 and I guess, that the Input impedance between CSP and CSN should be high, but ...

    The voltage there is 56mVpp.

    Is there any limiting element which shoots through and sink lot of current?

    When I switch on, the Input current is very high and the resistors burn. But when I use a current Limit of 50mA the current is limited and after some seconds it works. I cant put a load at the circuit because the limit.

    Switching frequency as expected.

    ???

    With best regards

    Gerhard

  • Hi 

    There is no possibility CSP/CSN sink a lot of current which can damage 100 ohm filter resistor unless the pins are damaged. 

    How big was your inrush current ? as you know V(csp-csn)= Rsense x Inruch current. 

    Regards,

  • Hi Eric,

    will measure the inrush current. Will also try to measure the current through the 100R. It  is strange, the last I expected was this behavior.

    Interesting: If the current through the sense filter remains low, the circuit seems to work well.

    With best regards

    Gerhard

  • Hi Eric,

    just an idea:

    The CSP pin is directly connected to Vin of the circuit.

    The Vin pin of the chip is connected to Vin of the circuit through a filter, built of 3.3R and 1µF, this is a recommended design by TI in some datasheet or app note.

    Now it is possible that CSP is at higher voltage than the Vin pin of the LM5122, maybe this causes some issue??

    As I told in advance, this is just an idea for now.

    When I Switch on and off, the circuit works (without load) but sometimes Fails, sinking 200mA and the two resistors starting to burn. I also can add very slight load (19mA) and it works for 10 seconds or so and than enters Fails save mode. This isnt what I expect (want 750mA) but is correct somehow, no burning parts and no other Problems. Removing thie load brings the circuit back to normal function most of the tryouts, but also current raises and R burns.

    With best regards

    Gerhard

  • Hi

    VIN pin voltage can be different than CSP pin voltage .

    Regards,

  • Hi Eric,

    ok, so this is ok.

    Other issue.

    I want to use the 4-phase configuration shown at Fig. 33 (b) in the datasheet. I want to use 4 modules, all similar layout, and Combine the Output (series). This leads to layout issues, so shortest track between chip and RT isnt possible any longer.

    It turns out, that the circuit runs at a very high frequency, after a patch, I put the RT direct on one module (I still test with only one module) solves this.

    But is it possible, that the chip is damaged now and is running at 2Mhz for some minutes a reason for the strange behavior now?

    There were other possible problems, SS should have only one capacitor, or RES. Is it possible to set a capacitor directly on each module, which leads to correct layouts?

    For fsync I think about placing a Inverter SN74LVC1G04 on each module. The pullup at the Input gives a low Impedanz 0 on the Output togetehr with RT closest to the chip this is a good layout for free running and feeding some fsync will also work according the specs.

    Only drawback, the slave moduls need now other circuit, cause the Inverter and RT isnt used at slaves, any idea?

    With best regards

    Gerhard

  • Hi 

    I am not sure I am understanding your questions correctly. 

    - Only parallel output connection is allowed in such a multi-phase configuration. A series connection is not allowed. 

    - Please check how clean is your RT pin voltages.  Any 2MHz noise ?

    - Please check FB and OPT pin status

    - If possible, please post fSYNC and four V(RT) waveforms. 

    Regards,

  • Hi Eric,

    as I use a isolated flyback topology, there is no reason to not have the Outputs in series.

    I use schematic from Fig. 40, but without the Transistor at the secondary side. Here I just use a Diode. In the TINA-Simulation this works really well.

    But as Long as I cant get one module to work, I dont think about that.

    Histrory:

    Trying out with one module. Doesnt work. Find out, that the switching frequency is about 2Mhz, thats way to high. And burning the two 100 ohm resistors at CSP and CSN.

    Patching the module, now RT sits Close to the chip and the switching frequency is as expected. Still burning the resistors. But, the circuit works, FB as expected (1.2V), RES ok and Vout ok without load.

    It also works with very small load (~2W). Increasing the load lets the circuit fell into power fail mode.

    Power fail mode itself works as expected.

    Switching off the load brings the circuit to normal operation, or 140mA rush in and the two resistors were burning.

    Maybe the chip has some damage now, cause during the first tryout the switching frequency was too high causr the layout around RT wasnt correct.

    i will try to make a eval board, placing lot of testpoints and also uses a 74LVC1G34 to buffer fsync or have a low impedance 0 for RT according to the datasheet. (Fig. 26).

    This way I can get a sync Signal from the base PCB to the module and thanks to that buffer I dont violate the r ecommended layout rules.

    One open question is:

    The fsync/RT pin of a slave module is direct driven by the fsyncout pin of the master. As I have quite Long trace (master, base PCB, slave) I guess it will be wise to have also a buffer on the slave. No Problem, cause I originally want to have only one kind of module and the role (master or slave) is determined by the socket-

    Now this strategy is in Troubles. Is it allowed to have a buffer and RT resistor at the slave? A buffer alone shouldnt be a Problem, but the resistor ...

    Any idea?

    With best regards

    Gerhard

  • Hi Eric,

    here the schematic for one module as I will realize for Evaluation. The final Version will be without the testpoints and with all changes found during Evaluation Phase.

    The Mainboard contains a isolated error amplifier, extra tested, works and some Support circutry like compensation, Css ... according to the datasheet.

    With best regards

    Gerhard

    Power Source Module Dev.PDF
  • Hi Erik,

    did you get the schematics?

    Any suggestions?

    Any ideas?

    With best regards

    Gerhard

  • Hi Kreuzer

    Sorry for the late response.

    RT resistor is not required in slave mode. In slave mode, RT resistor is no use.

    Css or Cres can be placed directly on each module, but all should be connected together eventually.

    As a protection, please try to add a diode from CSP to CSN and the other from CSN to CSP.

    Regards,

  • Hi Erik,

    Ok, two anti parallel diodes across CSP and CSN.

    As I want to have the same modules for master and slave I will have the resistor there, at my dev board I will have a Jumper and will see whats happen with and without this resistor.

    With best regards

    Gerhard

  • Hi Erik,

    here the TINA Simulation, last Version. The compensation isnt at Optimum, but it  is good enough to get an idea how the circuit should work. I can't find any Problem, all signals were in specs, as far as I can see.

    Maybe you or someone else of TI can found a reason why the filter resistors at CSP and CSN buring ..

    With best regards

    Gerhard

    100V Flyback 13 4 2014.TSC
  • Hi Gerhard

    I just like to know whether you are still seeing the CSP/CSN filter resistor damage with the anti-parallel diodes.

    Regards,

     

  • Hi Erik,

    so, new PCB is there and ... not working.

    The two resistors dont burn, so the diodes may help or whatever is different.

    But:

    - Voltage on sense resistor is very high (6.8mOhm, Kelvin Connection!!) beliving this values I have about 44A there ..

    - Chip enetrs Fails save mode

    - Shorting RS helps, so the reason for failsave mode is likly the high voltage on Rsense.

    - Now Output is ok at no load condition, no failsave, Looks good.

    - Applying a load (U out 107V, Rl = 3000) drives the chip into fail save mode again.

    Fazit, this chip won't work, for what reason ever.

    Is there another chipset I can use?

    Needs: 3V to 100V out, 50W, which means 0.5A at 100V and 0.75A at 68V. Isolated. Input is 20-30C DC.

    4 Moduls will give me 400V, cause the secondary side is connected in series.

    Usage of Standard parts ==> no Special transformer!!!!!!

    Simulation file for LM5122 provides at a earlier post, but there is no correlation between Simulation and reality, sorry.

  • I took a look at this thread and your schematic.  I don't think you can operate with those outputs in series.  I do not see any connection to COMP and FB except to your connector.

  • Hi Jo,

    there were 4 moduls, sharing FB and COMP as described in the LM5122 data sheet. This moduls were inserted in a Motherboard, which contains the infrastructure circuites.

    At the Output (4 moduls in series) there is a resistive devider and a optical isolated amplifier providing the Information needed for the Controller.

    Uptil now i only work wit one module, but I have serious Problems with the current sensing which drives the chip into failsave mode and the after shorting this, I still cant get out any current.

    With best regards

    Gerhard

  • Hi Gerhard

    I am sorry you still cannot make it working.

    Looks like there is a big inrush current which you cannot control .Since you are not using the synchronous driver of LM5122, I think you can try normal Flyback devices with low side current sensing. Low side sensing does not affected by the inrush current.

    Regards,