LM5085 current limit problems

Followup: it appears that having a lower current limit improves things in that signal integrity problems at the feedback pin are reduced.  Of course I'm not getting the power out that I need, either.

I get continual erratic dropouts as illustrated in the attached scope photo.  The upper trace is FB pin, the lower is (AC coupled) approx 40V on the 220uF output cap.

If the FB pin exceeds 1.6V: "the internal over-voltage comparator immediately switches off Q1. The next on-time period starts when the voltage at FB falls below the feedback reference voltage." (datasheet page 10).  I assume this is NOT what I'm seeing, since the dropout is in the 2msec range.  (They vary from 1msec to several).  If the FB pin ever sees >= 1.6V it is for a handful of usec so the LM5085 should have restarted within usec, not msec.

If there is errant current-limiting trip, I would expect to see 10usec or less off-time based on the "off-time vs Vin and Vfb" graph as described in the "current limiting" 2nd paragraph in the datasheet.  So I don't believe this is what is happening.

In the "soft start" section of the datasheet: "If the voltage at FB is below the regulation threshold value due to an over-current condition or a short circuit at VOUT, the internal reference voltage provided by the soft-start circuit to the regulation comparator is reduced along with FB. When the over-current or short circuit condition is removed, V
OUT returns to the regulated value at a rate determined by the soft-start ramp."  also: "The soft-start ramp time is typically 2.5ms".

This leads me to believe that the problem I'm having is caused by the FB pin being below some unspecified voltage (regulation threshold is 1.25V, but obviously FB will ripple above and below that in normal operation), and this is causing the soft-start to trigger.

We have 44 pcbs made (with $150 worth of LEDs on each) and more than $25,000 spent on R&D and initial production since this was not seen in initial prototypes.

Any assistance greatly appreciated.

J

Hi Jesse,

I am sorry to hear that you are having these problems. Can you share the complete schematic and the design specs? You can upload the files here or send me directly at my email id.

Regards,

Hi Jesse,

Thank you for the information. To summarize, it seems you are switching the FB signal to 1.5V when you don't want current and switch FB signal to 1.1V when you want current. Therefore it is not really using the internal regulation loop.

Now, there is a feature in the LM5085 (see the soft-start section of the datasheet) that discharges the soft-start (SS) pin, internal to the IC, to V(FB) in current limit. This allows the VOUT to recover from the a short-circuit or overload condition with soft-start. I suspect that your switching of FB pin causes to SS to discharge, hence the slow recovery.

Let me know if this makes sense to you.

Regards,

Vijay

Hi Vijay, thanks for looking at schematics and layout.  I agree that it looks like a low voltage on the FB pin is causing the softstart to discharge.  However there is no information in the datasheet as to what this voltage is.  According to the datasheet: "If the voltage at FB is below the regulation threshold value due to an over-current condition or a short circuit at VOUT, the internal reference voltage provided by the soft-start circuit to the regulation comparator is reduced
along with FB."  That's all the info I can find.

Can you find out at what voltage this happens at?  Or starts to happen at, if the SS discharge is proportional to how much the FB pin is below this unknown value?

The FB regulation threshold is 1.25V typical, and 1.225V min to 1.275V max.

If you see a specific issue with my design where I'm switching the FB voltage based on an external comparator and logic, instead of using the LM5085 internal comparator to do the same thing, please let me know.

Second question...

in Figure 26 there are two circuits for current limit sensing.  As advised by the datasheet, I'm using the sense resistor type.

in my design, if I'm not hitting a current limit during normal operation, then there should be no difference in performance if I replace Rsense (0.05 ohms in my case) with a wire, correct?

I'm seeing totally different, unusable problems when I do this.  I'm trying to understand why.

I do not need the current limit and would prefer to completely disable it if possible.  Is this possible?

Thank you!
J

Hi Jesse,

The SS voltage follows FB in overcurrent. So we can assume it is same as FB for all practical purposes.

Regards,

Hi Vijay, thanks for the note.  Looking at the block diagram I can see that they are effectively wired together.

In the block diagram, the soft-start module has 1.25V internal reference and the FB pin going into it (as well as an OR of other error signal sources), and its output going to the "regulation comparator" that then goes to "Gate driver control logic" module.

So it remains unknown what voltage on the FB pin begins to trigger soft-start.  It cannot be 1.25V or the LM5085 would not work since it would then be in soft-start whenever the Vout is below the designer's target voltage.  Another way to ask this question is at what FB voltage is required to get the LM5085 to run normally, and *not* in soft-start?  At initial power-on, Vout rises, the FB pin voltage rises, and since it is less than the unknown voltage the LM5085 is in soft-start mode.  At what voltage at the FB pin does it exit soft-start?

Thanks,

J

Regarding the overcurrent protection: I would say that if the part is trying to build voltage because of swicthing FB pin(, although a discharged SS helps), it will hit current limit depending on the converter dynamics. It is possible that when you remove the current limit the inductor saturates.

Before I suggest any radical changes in design, I would like to better understand what you need the LM5085 circuit to do. To change the VOUT, normally you would set the circuit for a nominal voltage (closed loop) and then change that voltage using additional injection at the FB node. (see the blog http://e2e.ti.com/blogs_/b/powerhouse/archive/2013/12/19/how-to-control-output-voltage-with-the-lm5085.aspx). Your circuit is atypical in that it has not closed loop from VOUT.

The other part of that is confusing me is that the current loop seems to be very hysteretic with no compensation. The current control schematic that I have used in the past should be something like this one. The DAC can be a fixed voltage (as in your circuit):

Hi Vijay, thanks for the blog post and circuit.  What I'm trying to do is different.  The load is a string of LEDs, that are highspeed (24Khz with 1000 steps) PWM dimmed.  The circuit is using the LM5085 to create the correct voltage on the output cap such that when the LEDs are on, the correct amount of current flows through them, and thus the LM5085 will be told to pump (or not) during the PWM on-time.

However the PWM on-time can be very short (100nsec range) and since the current through the LEDs can only be measured during the PWM on-time the LM5085 cannot be used as-is.  I need to create my own closed-loop feedback loop.

So only when the PWM is on is the LM5085 allowed to pump, and only if the current through the current-sense resistor I have with the LED string is below the target value (125mV).  So I have a comparator that gives yes/no for the current-sense resistor, and that yes/no is ANDed with the PWM on-time.  Is is this signal that goes to the LM5085 feedback pin to tell it to pump or not.

There were problems with the comparator's output being "chattery" and not swinging close enough to ground or 3.5V as the datasheet specifies (a maxim part) which I have solved with a dual schmitt with a 300nsec RC delay between the stages.  I have also added a 1000pF cap on the switched voltage divider that makes the FB signal in order to slow it down a little (to 1usec edge rates) and to try to filter electrical noise that may cause it to be > 1.5V or < 1.1V.

Since the FB pin on the LM5085 goes to an internal comparator it should not matter how fast or slow the FB signal changes, all that matters is the internal comparator switches as it should.

Regarding the inductor saturating - how would I calculate what rated current is required in this design?  When the LEDs are on, the current is approx 700mA @ 38V or so (for the upcoming pcb spin).  The LM5085 switching frequency is approx 245Khz I believe.  (130K ohm RT resistor) and the power supply is 48V input.

Can you have someone involved in the design of the LM5085 comment on the minimum FB voltage required to not trigger any soft-start circuitry?

Thanks!!
J

Hi Jesse,

We got some inputs from the design. The SS to FB clamp is set to ~100mV. If FB fall below SS-100mV, it starts to pull SS down as well. Not dependent on current limit event. Hope that helps.

Regards,

Hi Vijay, thanks for the clarification.

Hi Vijay, just to be sure I understand this: when you say the SS to FB clamp is set to approx 100mV, since the regulation threshold point for FB is typically 1.25V, this means that when FB falls below 1.25V-100mV= 1.15V the softstart starts to become activated.

Is this correct?

Since the LM5085 datasheet says the FB regulation threshold is 1.275V MAX, that means as long as the voltage on the FB pin is at least 1.275V-100mV= 1.175V in my design the softstart will never accidentally become activated.

Is this correct?

This is important info - may I suggest that TI adds this to the datasheet: both the 100mV typical specification and an improved description in the "SOFT-START" section.

Thank you so much for all your help.  I will test and incorporate changes to both my FB pin signaling and current limiting design in the next revision of the pcb, which will be next week.

J

Hi Jesse,

By "activated", I think you mean the clamp trying to discharge SS. That is correct.

The actual schematic has 132mV of offset. there will be some variation, I assume because of process/temp. So I would leave some margin.

I still think the loop should be closed around VOUT. There is also some ripple requirement on FB for consistent switching.

Hi Vijay, I'm confused why my design doesn't "close the loop" around VOUT and the ripple requirement.  In my design, FB will be switched between 1.32V (for "off") and 1.2V (for "on") for at least 500nsec every PWM cycle, which is at 24Khz.  So FB will see a 24Khz "ripple" for sure.  Additionally, during the PWM on-time, the FB pin will be switched between the 1.32V and 1.2V as needed to maintain the target output voltage, as determined by the LED current sense resistor and my comparator.  Doesn't this "close the loop" with VOUT?  Is there a particular reason the FB pin needs an analog connection of some sort to VOUT?  Why would that matter?

Thanks!

J