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LM5116 large output ripple

Other Parts Discussed in Thread: LM5116

Dear Sir/Madam,

I am experiencing 400mV pk-pk output ripple when the LM5116 is used to convert +48V to +12V@8A.

The amplitude of the ripple is pretty consistent when the output is swept from 1A to 8A with an eLoad.

The circuit was designed using web bench with a change to the FETs due to availability.

The FETs do not get as hot as the inductor which sits at around 65-70 degrees.

The circuit can be found:

6318.+48V_TO_+12V.PDF

Q1. What could be causing the 400mV pk-pk ripple and can this be improved?

Regards Grant

  • Grant,

    The 12p4K RT resistor should set the clock around 220KHz.  A re you seeing the SW pin operate at that frequency?   The ripple frequency appears to be about half the programmed switching frequency.   Compare the ripple frequency and switching frequency to see if they are different.

    Sub-harmonic oscillations (below switching frequency) are generally due to insufficient slope compensation.  The value of the  RAMP pin capacitor set  the slope compensation for the LM5116 controller.  Using your component values for L  and RS in equation 3, page 16 of the LM5116 datasheet, I calculate 500pF for CRAMP.      If you agree with my math, try a smaller value for C191.

    If the ripple frequency and switching frequency are the same, then the linear ripple is likely related to ESR of the output capacitor C189.   Ripple in phase with inductor current is caused by resistance.   If that is the case, a lower ESR capacitor will reduce the ripple.

  • Hi David,

    Thank you for the response. Much appreciated.

    Initially i had a problem with the  FETs shown in the schematic Q7 and Q8 (BSC046N10NS3).
    The gate charge was too high and caused excessive heating and un-reliable behaviour.
    The FET that i am using now is BSC109N10NS3 G. There are a couple of TI FETs that i
    will evaluate next.

    I will adjust R83 for 220KHz.

    Ok, i see the incorrect value for the RAMP capacitor. Will try smaller value for C191.

    I have checked HO, LO ans SW and there is no undershoot, overshoot of instability.

    I will verify switching frequency and ripple frequency once i make the changes to C191 and R83.

    Once again, thank you. 

    Regards Grant

  • Hi David,

    Just wanted to thank you and close the loop.

    After changing the ramp capacitor C191 and selecting an output capacitor with lower ESR the output ripple was reduced to 50mV pk-pk at 1A and 80mV pk-pk at 8A.

    Regards Grant

  • Hi David,

    I have recently found several PCBs with revised LM5116 circuits that current limit at lower than 10A.
    That is several PCBs current limited at 5A instead of 10A.
    Previously i did testing and the revised circuit reliably supplied 9A both continuous and transient.


    I am at a bit of a loss to explain why there is such a wide variation in the current limit. 
    Are you able to assist by taking a look at the circuit or point me in the right direction?

    Regards Grant

  • Grant,

    A wide variation in current limit cannot be explained by the variation in the LM5116 controller.    The part to part variation in CS-CSG threshold should  be less than 15%.   

    Possibly you are triggering the hiccup mode current limit which is activated after 256 consecutive cycles of peak current limiting.   Hiccup protection pulls down the UVLO pin and the automatically releases to restart the converter in  soft-start mode.   You might check the UVLO pin of the boards with 5A current limiting.  It will be a steady value unless the hiccup protection  is being triggered. 

  • Hi David,

    Thank you for the response.

    I have confirmed that the UVLO pin is being pulled low then released.

    Is it possible for you to send me your email so we can to talk offline?

    Regards Grant

  • Grant,

    My email address is dpace@ti.com