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3 Stage Interleaved Boost using TPS55340

Other Parts Discussed in Thread: TPS55340

I am designing a 3 stage interleaved Boost using the TPS55340 IC.  To achieve good current sharing, I am connecting the error amp (FB) pins together - as closely as possible.  However, I think I also need to connect the COMP pins together.  When connecting the COMP pins together, because this is a peak-current mode control IC and because the error amp is a transconductance amp, I think the compensation components scale by a factor of 9 (3x for 3 device gains, 3x for the currents summing together).

Can anyone clarify this for me before I spin a board?  And does anyone have any advice for the layout of the compensation components?  I have a switching frequency of 600kHz and am concerned about noise pickup.  Is approximately 25mm separation between each COMP pin acceptable?

Thank you all.

Joe Stark

  • I have not tried an interleaved boost using TPS55340, but I have attempted to current share with other current mode control devices using the technique you describe. I can tell you it is very sensitive too noise and tricky to implement even sharing between two devices. Even then you will not get perfect current sharing as the GMPS (comp pin voltage to peak current gain) characteristic is not closely matched. Maybe someone with experience using TPS55340 can add some additional comments. Can you post your intended schematic?
  • Thank you for your response, John, and you are quite correct - with the comp pins tied together and the output diodes thermally well-connected, current sharing was never better than 8% between the three interleaved converters.  With comp pins separated, one converter would always be in pulse-skipping mode while the other two supplied the load (measured on 10 boards).  The attached schematic (redacted and pruned for clarity) readily a load varying from 4W to 40W in a footprint of 50mm x 15mm.  With in input voltage range of 9V to 16V, the output efficiency ranged from 84% to 93%.

    Schematic_Print.pdf