Hello,
Is it safe to connect EN pin of TPS63001 through a resistive divider from the input voltage in order to implement a rudimentary UVLO function, as shown in the schematics below? In other words, does the EN input tolerate voltages between GND and VINA?
We do understand that VIH and VIL absolute limits are not guaranteed but we need to increase the rising UVLO threshold of the VINA input somehow. We are in a position where we need to modify an existing design and this solution would be ideal for our needs.
Best regards,
Bojan Kosic
M.Sc.EE, Embedded Hardware Developer
Institute Mihailo Pupin
IMP-Telecommunications, Ltd.
Volgina 15, 11060 Belgrade, Serbia