Other Parts Discussed in Thread: TPS62160, TPS62125, LMC6482
Hello all,
I am with a project that needs a negative voltage and have chosen the TPS62175. For the non-inverted (normal) configuration
there is an example in the datasheet for the PCB layout. However, when applying the chip to generate a negative voltage
there is no such an example anywhere. From the datasheet, for the inverter configuration, the "normal" positive output
becomes ground (GND), and what was normally ground now becomes the negative output (-VOUT).
The question is, what happens to the exposed pad EP (underneath the chip) in an inverter configuration?
Is this EP also connected to ground, as before with the positive output, or this EP is now connected to the negative
output (-VOUT)?
I have consulted so far the datasheet, EVM document SLVU743, and the Application Note SLVA542A, and I couldn't find any
reference the PCB layout for the inverter configuration.
Thanks.