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LM3671: Protection against (VOUT > VIN)

Part Number: LM3671

Hello,

In our design we use a LM3671MF-ADJ set to 3.05V, as in the following picture.

LM3671

The problem is that when we debug our designs, we provide 3.3V on VCC and VBAT is left unconnected.

This results in a dying LM3671.

As a first protection against this we inserted a shottky diode from VOUT to VIN to make sure that the voltage difference is not so high, but this did not solve the problem and the lm3671 are still dying.

Do you have any recommended protection circuits to prevent the LM3671 from dying when VOUT > VIN?

Best regards,

Bernhard Petschina

  • Hi Bernhard,

    I guess you intend when SW>Vin ? LM3671 does not have any Vout pin.

    when you don't have D1 installed, the device dies because the High side FET's backdiode conducts when SW-Vin is enough to turn it on, and charges the resonant tank L2-C12, where the damping is basically due to the DCR+ESR+Rd... would be helpful if you could take some one-shot scopes and confirm this theory: when Vcc steps to 3.3V and Vbat is leff floating you see a SW and Vin overshooting the 6 V absmax. Thie brakes the device.

    when you install D1 you are creating a lower impedance path and avoiding that the High side FET's backdiode charges C12. But the device gets enabled as well, hence it starts switching in a configuration it is not designed for. This is what breaks it.

    I suggest you to disconnect the LM3671 in some way when VCC is connected. For example you can use our eFuses or power multiplexer. You can start your research from this link:

    www.ti.com/.../integrated-fet-devices-overview.page

    Best regards,
    Emmanuel
  • Hello Emmanuel,

    Thank you for your answer!
    I already suspected there wouldn't be a simple solution to this problem. I will see if we can change the design to make it work.

    Another problem we encountered today was that the device even breaks if it is operated normally with VIN > SW.
    The first time our boards are powered everything works, but when the input voltage is disconnected and reconnected after some time, the device doesn't work anymore (short circuit between VIN or EN and GND).
    I suspect this is because we have some big capacitors with a total capacity of about 400uF on the VCC side, which keep this side powered for a while longer after VBAThas been disconnected.

    I wanted to try removing D1 and putting a pull-down resistor of about 1MOhm between EN (and VIN) and GND.
    But now I don't think this will help because of the FET's backdiode, which will keep the input enabled.

    Edit:

    I think we will go with a load switch like the TPS22910 (or a more hand-solder-friendly version) connected to SW and controlled by VBAT, similarly to the design on the CC3200-Sensortag.


    Best regards,
    Bernhard

  • Hi Bernhard,

    what do you mean by " when the input voltage is disconnected and reconnected after some time" ? Do you hot plug the battery (mechanical connection with voltage present) ? This kind of connection can cause damages to the device as well, because of the uncontrolled voltage and connectors inductances.

    By the way, removing D1 is the right thing to do. Rather than pulling down EN with a 1 Meg, I would use it to control the device in an active way, with the same logic used to control the load switch you mentioned. Indeed, quoting the datasheet at point 7.4.3 about Shutdown:

    "Setting the EN input pin low (< 0.4 V) places the LM3671 in shutdown mode. During shutdown the PFET switch, NFET switch, reference, control and bias circuitry of the LM3671 are turned off. Setting EN high (> 1 V) enables normal operation. It is recommended to set EN pin low to turn off the LM3671 during system power up and undervoltage conditions when the supply is less than 2.7 V. Do not leave the EN pin floating."

    Just use a reistor between your logic and EN pin (10k should be a safe value). But please, don't use the loadswitch on the  SW node ! With the switch closed, your efficiency drops down, and when you open it you are are opening also the control loop. Use the loadswitch after the 10uF output cap disconnecting it from Vcc!

    With D1 out of the games, the EN pin pulled low, and output disconnected from VCC, the device will just work as expected.

    Best regards,

    Emmanuel

  • Hello Emmanuel,

    We decided to use the TPS22929 as a load switch after the 10uF cap.

    You can see our design in the following picture:

    As the lm3671 is the main power converter for our design we can't control its EN-pin actively.

    Instead we now inserted a voltage divider to make sure EN goes high (>1V) when VIN is sufficiently high (>3V).

    Btw. VBAT is the battery voltage of a LIPO-battery (>3.3V - 4.2V).

    Can you please check the new design and tell if this would work?

    Best regards,

    Bernhard

  • Hello Emmanuel,

    Can you please look at the previous post and tell us if this new approach would work?

    Best regards,

    Bernhard

  • Hi Bernhard,

    sorry for this late answer.

    You need to invert the TPS22929's Vin and Vout because of the backdiode in the swithc's FET. Once you do this, the design would work only if C12 is discharged when you connect Vcc, because of the Von threshold being greater than 0 and dependent on Vin (check datasheet).

    Best regards,

    Emmanuel

  • Hello Emmanuel,


    Why do we have to swap VIN and VOUT of the TPS22929?
    According to the typical application on page 14 of the datasheet VIN should be connected to the power supply.
    Also, swapping the pins would not work because then VOUT > VIN+VRVP and the reverse current protection would kick in.

     

    I think there was a misunderstanding about the general direction of the current.
    Normally the system is powered by VBAT (3.3 - 4.2V) and VCC is provided by the LM3671.
    Only when we are debugging the board is directly powered by VCC. In this case the battery on VBAT would not be connected at all
    (in this case we can guarantee that C12 is discharged at least to the point that both chips are disabled
    (simply by the fact that the time between disconnecting VBAT and connecting VCC is long enough)).

    Best Regards,
    Bernhard

  • Hi Bernhard,

    Let's have a look at section 9.2 of the datasheet. If you connect it as it is, when you will use Vcc (in Debug only, as my understood) with Vbat discharged, the back-diode will conduct bringing back the original problem. To avoid the problem, reverse Vin and Vout of the switch. Indeed, if you want to see it in the terms of the datasheet, in the debug configuration your power supply is meant to be Vcc, because no energy is coming from Vbat.

    If you still have concerns, please let me know.

    Regards,
    Emmanuel
  • Hello Emmanuel,

     

    In 9.2 you can also see a block labeled “Reverse Current Protection” and according to 9.3.4 this block disables the FET and disconnects the back-diode whenever VOUT > VIN+VRVP.

    We have the following scenarios (switch connected as shown):

    1.) Normal operation:
    VBAT > 3.3V
    VIN of TPS22929 = 3.05V
    VCC not actively powered
    In this case VIN > VOUT and ON > 1.1V and the switch is turned on and VCC goes to 3.05V (minus some voltage drop caused by Ron and Iload)

    2.) Debugging:
    VBAT not actively powered
    VIN of TPS22929 = 0V
    VCC = 3.3V
    In this case VOUT > VIN and ON < 0.4V and the switch is turned off. Additionally because VOUT > VIN the reverse current protection kicks in and disconnects the back-diode.

    The same scenarios when VOUT and VIN of the switch are swapped:

    1.) In this case VOUT > VIN and the reverse current protection kicks in (state of ON doesn’t matter) and the switch is turned off.
    This is not what we want.

    2.) In this case VIN > VOUT, but ON < 0.4V and the switch is turned off.
    This is what we want in this case.

     

    I think this is how the switch will behave based on the info from the datasheet.
    Or do you see a major flaw in my reasoning?

     

    Best regards,
    Bernhard

  • Hello Bernhard,

    Your reasoning is totally correct. My apologies, I misunderstood your previous answer.
    I think this topology should work.

    Best regards,
    Emmanuel
  • Hello Emmanuel,

    Thank your for your help!
    I will test this circuit and post the results here.

    Best regards,
    Bernhard