This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

  • TI Thinks Resolved

TPS54290: Not getting Out2 as expected

Part Number: TPS54290

Hi,  We are using TPS54290 in our design and using it as Dual output source ( 1.8V and 3.7V respectively) .

PVDD1 and PVDD2 are shorted and fed by 12V supply.

Default EN1 and EN2 are pulled down. 

After turning on input PVDD1=PVDD2 = 12V . We are getting Out 1 around 1.48-1.9V  on 5 boards we tested( should be 1.8V as R1 /R2 at FB1 are 20K/16K) .

But major issue issue is with Out 2  . we are getting around 1.77V - 2V range on 5 boards we tested.  (should be 3.7V as R1 /R2 at FB2 are 33K/9.1K) .)

Is there any sequencing required for EN1 and En2  ( EN2 should come before EN1) in case when we have PVDD1 and PVDD2 tied together?

 

  • Can you post your actual schematic?  Can you provide waveforms showing SW1 and SW2?  You should be able to assert both EN simultaneously.  Make sure the PVDD rise time is faster than the SS time.

    Best  Regards,

    John Tucker

    BSR-CCP LV/MV DC/DC Applications

  • In reply to BHUPENDAR SINGH:

    Attached is schematic for your reference. Please let us know if you see any issue.
  • In reply to BHUPENDAR SINGH:

    Looks like EN2 is pulled down with 0 ohms while EN 2 is pulled down with 10 k. I would recommend 0 ohm for both, but that is probably not your issue. I'll need to see the waveforms. Sw1 and SW2 for sure and maybe VIN with Vout 1 and Vin with Vout 2 to start with. Make sure we can see individual pulses on the SW1 and SW2 waveforms.

    Best  Regards,

    John Tucker

    BSR-CCP LV/MV DC/DC Applications

  • In reply to JohnTucker:

    Hi John, yes we did try pulling down EN1 directly to GND. But it doesn't work. We disabled the OU1T1 (1.8V) by Pulling EN1 high but still see same issue with OUT2 ( 3.7V).
    Attached are snapshot of SW1 and SW2 .
  • In reply to BHUPENDAR SINGH:

    Your 1.8 V switching waveform looks more or less normal except that it is regulating to about 1.45 V rather than the desired 1.8 V. the 3.7 V waveforms are totally abnormal. What is your PCB design like?

    Best  Regards,

    John Tucker

    BSR-CCP LV/MV DC/DC Applications

  • In reply to JohnTucker:

    Hi John. in our board we are feeding 12V DC as input to TPS54290 and generating 1.8V ( max load current will be 750mA) and 3.7V ( Max load current will be 415mA. 1.8V is directly given to controller IC . But 3.7 V is fed to 3 LDOs to generate 3.3V and which is given further to rest of the IC modules on our board. Default we made EN pin of TPS54290 as Low so that both can be enabled by default.
    Is max output capacitor value can affect it. Can it create start up problem as mention in datasheet . Please let us know if you find any issue with TPS54290 schematic I Shared with you.
    Also We disabled all the LDOs on 3.7V path and still facing same issue. The only difference is now the Output fluctuating between 1.7V to 2.3V . Previously it was around 1.7 to 1.8V only. Also we isolated the load from 1.8V output and didn't observe any improvement.
  • In reply to BHUPENDAR SINGH:

    I did not see anything specific on your schematic. 1 x 22 uF or 2 x 22 uF should not be viewed as excessive capacitance in my opinion. I think I would cut the etch (or lift or remove components) to all loads on both rails, to see if your circuit can start up normally. Alternately, you could get a TI EVM with a known good layout and modify it to replicate your schematic. It is possible that your pcb layout is not good or you have interaction with other circuits. Even though your 1.8 V rail switching waveform looks "normal" it is not the correct duty cycle for your 1.8 V output. The 3.7 V rail looks unstable or maybe current limited. Maybe your input voltage supply is current limited? As you may have noticed, troubleshooting over the internet is not particularly efficient. Do you have a local FAE you typically work with?

    Best  Regards,

    John Tucker

    BSR-CCP LV/MV DC/DC Applications

  • In reply to JohnTucker:

    Thanks John!
    What is the Output capacitor value which we consider as excessive?
    As the 3.7V Output of TPS54290 goes to 3 LDO and each has one input capacitance ( 1 uF, 10uF, 2.2uF respectively) at their input so effective Output capacitance will be around 35uF. Similar way for 1.8 V effective output capacitance will be around 56uF.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.