• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 62 subscribers
  • Views 1167 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65218: Strobes 1/2, FSEAL, DCDC5/6 Question

Trent Oshiro
Intellectual 505 points
Other Parts Discussed in Thread: TPS65218

We are using the TPS65218.  It says the following about Strobes 1 and 2:

8.3.2.3 Strobes 1 and 2
STROBE1 and STROBE2 are dedicated to DCDC5 and DCDC6 which are ‘always-on’; powered up as soon as
the device exits the OFF state, and ON in any other state. STROBE 1 and 2 options are available only for
DCDC5 and DCDC6, not for any other rails.
STROBE 1 and STROBE 2 occur in every power-up sequence, regardless if the rail is already powered up. If the
rail is not to be powered up, its respective strobe setting must be set to 0x00.
When a power-down sequence initiates, STROBE1 and STROBE2 occur only if the FSEAL bit is 0. Otherwise,
both strobes are omitted and DCDC5 and DCDC6 maintain state.

Does this mean DCDC5 and 6 will be cycled when the PMIC is powering up or down if FSEAL =0?  Our goal is to have DCDC5 and 6 stay always on so the PGOOD_BU output is driven high at all times.  Our IN_BU is powered by system power (battery).  We are not using a coin cell.

Any help is much appreciated.

Thanks,

Trent

  • 0
    TI__Intellectual 1990 points

    Hi Trent,

    Sorry for the late reply on this. Thanks for the post! Below is a description of the behavior of DCDC5/6 when FSEAL = 0 and when FSEAL = 1. In short, when FSEAL = 0, DCDC5/6 will act as normal rails and will power up/down when any power event occurs (i.e. PWR_EN, AC_DET, PB etc...). To ensure DCDC5/6 stay on when system power (battery) is applied to the system FSEAL needs to be set to 1. Below is a description of how this can be achieved without the use of a coin cell. Let me know if you should have any questions on this implementation or TPS65218. Thanks again for the post!

    FSEAL = 0

    DCDC5/6 will power down when PWR_EN is asserted low

    DCDC5/6 will power down then power up when PB is pressed

    DCDC5/6 will power down when a power good fault occurs on any of the DCDC's or LDO1.

    FSEAL = 1

    DCDC5/6 will NOT power down when PWR_EN is asserted low

    DCDC5/6 will NOT power down then power up when PB is pressed

    DCDC5/6 will NOT power down when a power good fault occurs on any of the DCDC's or LDO1.

    How to set FSEAL = 1 without a coin cell

    In order for FSEAL to be set to 1, a valid voltage must be asserted on the CC pin when FSEAL is being set. Also this voltage must be applied before or at the same time as the system power. The recommended operating range of the CC pin is 2.2-3.3V. A resistor divider can be utilized to help divide down system power (battery) when the battery voltage is at 4.2V. After FSEAL has been successfully set to 1, the CC voltage can be removed if desired to help save power. DCDC5/6 will remain on in this situation because FSEAL has already been set to 1.

     

    Regards,

    Paul Kundmueller

  • 0 in reply to Paul Kundmueller
    Intellectual 505 points
    Hey Paul,

    So we finally tested out the changes you suggested and unfortunately DCDC5/6 are still shutting down. Without going into details of our schematic, our current setup is something like this (based on your instructions): Battery AND/OR USB Input -> Battery Charger (System Power) -> 3.3V Regulator -> CC Pin (25) of the TPS65218.

    Is there anything we may have missed or something additional we need to do to ensure DCDC5/6 always stay on?

    Thanks,
    Trent
  • 0 in reply to Trent Oshiro
    Intellectual 505 points

    Some more details on the 3.3V Regulator - It has a roughly 400us startup delay from input to output.  That means the CC pin is getting 3.3V about 400us after IN_BU, IN_LDO1, IN_DCDC1, IN_DCDC2, IN_DCDC3, IN_DCDC4, and IN_BIAS are getting the system power from the battery charger.  Is this delay significant enough to cause problems?

    I also wanted to let you know that we did check the FSEAL bit and it is still not being set to 1.  Do we have to set FSEAL = 1 manually (by writing to the password register) for every single PMIC chip we receive from the factory?

  • 0 in reply to Trent Oshiro
    TI__Intellectual 1990 points

    Hi Trent,

    Yes the FSEAL bit needs to be written each time by the SoC or I2C master to set the FSEAL bit to 1. Below are some more details on how the FSEAL bit works. When your main supply and CC power are both lost the FSEAL bit will be reset to 0. Let me know if you have any questions. Thanks!

    Regards,

    Paul Kundmueller

  • 0 in reply to Paul Kundmueller
    Intellectual 505 points

    Hey Paul,

    Ah I see, I was under the false assumption that by following your How to set FSEAL = 1 without a coin cell instructions from your first response that we wouldn't need to do any I2C writes.   I cannot view the details image you included in your latest post.  If I have any follow-up questions I will post them here.  Thanks for your assistance.

    Thanks,

    Trent