TPS6590376 POWERON doesn't always work

Hi Michael,

If you power both boards at the same time, I would measure VCC and LDOVRTC on the PMIC. If LDOVRTC is not ~1.8V, that would indicate a problem.

I would also measure VCC when you power only your baseboard. PWRON is internally pulled up to VCC, so if it is floating to 0.5V, I wonder if there is backfeeding in to VCC. This could be an issue. VCC should be supplied first, meaning all other pins should be supplied at the same time or later than VCC. If you can try booting with this sequence, see if it solves your issue.

Regards,
Karl

Thanks Karl. I assume you mean LDOVRTC_OUT, pin A18, and VCC1, pin C7. I'll instrument those today and see what I find.

I have another question related to this, but I'll ask on a separate post to make it easier to catch in a search.

Cheers!
MADman

Update: I scoped LDOVRTC_OUT and VCC1.  I captured a few examples of traces when the board booted, and a couple when it didn't. I can't see any difference in the traces that would predict whether boot would succeed or not. See anything concerning? Yellow is VCC, cyan is LVDORTC_OUT.

These two TIFFS are examples of power-up before a successful boot:booted 1.TIF

booted 2.TIF

These two are examples of power-ups that failed to boot:

no boot 1.TIF

no boot 2.TIF

Michael,

It's concerning that LDOVRTC is at ~1.3V while VCC is off. LDOVRTC is sourced from VCC, so it should only be on when VCC is supplied - something seems to be backfeeding it. Also, LDOVRTC powers the digital core, so powering it to an intermediate state of 1.3V could cause different behavior between different devices.

My guess is some I/O signal is being supplied before VCC. Can you check if this is the case? If you don't know which signal, I would look at table 3-1 in the datasheet and check the "VRTC" level signals first.

Regards,
Karl

Michael,

Another thing I just noticed, LDOVRTC should be at 1.8V, but your scope shots look like it is at ~3V. Is this correct? This would be another issue, possibly caused by >1.8V on some VRTC-level digital signal.

Regards,
Karl

LDOVRTC is ~1.8V. Channel 2 is offset a few divisions above Ch 1. I don't like traces on top of each other, though sometimes it makes levels confusing.

I'll look into that today. Thanks!

Sorry about that, my mistake. Must have been too early on a Monday.

Were these two cases "PWRON pressed after power supplied" and "PWRON held low when power was supplied"?

You can check the basics first: RESET_IN=low or PWRDOWN=high will keep the PMIC from being started. Please double check neither of these are true in the case when both are powered at the same time.

I was also wondering about the supplies when the baseboard ONLY is supplied, meaning the daughter card is unsupplied. If I understood correctly, there was some voltage on PWRON if you do this. In this case, can you check which PMIC signals are being supplied from the baseboard? For example, is NRESWARM, NSLEEP, GPIO_7, etc. being powered while the PMIC VCC is off?

Regards,
Karl

I had to add test wires to get access to the bottom of the Eval board. I looked at GPIO_7, NSLEEP, RESET_IN, and NRESWARM. All were at or very near 0V (scope is picking up a lot of noise).

I decided to try adding a dead-bug circuit to the power supply board. The circuit will disable the 5V regulator, which is the source for the Baseboard's 3.3V, until 12V is up, plus an RC time delay.

Luckily, this is a prototype. In product, I might force ALL 3.3V to be controlled by the PMIC REGEN pin.

Cheers!

MADman

Well, delaying the Baseboard's 3.3V from coming up didn't help. With the above mod to the power supply board, Baseboard 3.3V comes up about 20ms after the PMICs VCC reaches 3.3V.

I noticed an interesting behavior just now, when I power the Eval board and Baseboard separately. Normally, we power up the Eval board, then the Baseboard, then hit the PWRON switch. This results in a successful boot.

But when we power the Baseboard first, then the Eval board, hitting the PWRON switch results, usually, in no boot. For no reason, I removed power from the Baseboard and left the Eval board powered up, and boot-up started!

Does this mean PWRON is latched? Does this give a clue as to why the state machine seems to stick in OFF - can a voltage be too high, or some comparator output be latched?

I'll keep playing with this, but if this conjures any new things to probe, please share.

Thanks!

MADman

Michael,

Very interesting. Can you scope the PWRON pin during this? Does it toggle at all while you're powering the board, or unpowering the baseboard? I don't think PWRON would latch to "inactive", since it's an active-low signal, and is level sensitive. So if PWRON is being pulled low, I would expect the PMIC to register the event.

Maybe a simple question, but have you verified that pressing the switch when the baseboard is powered actually pulls the PWRON pin low?

Regards,
Karl

I'm typing this as I go, please bear with me.

Scope probe on POWERON pin

Baseboard powered only: POWERON pin at 0.85V
Eval bd also powered up: POWERON pin at 3.3V
Press switch: POWERON pin at 0.0V. I released the switch as soon as I saw the trace fall to zero.
Processor not booting
Power off Baseboard (scope set to trigger on falling edge of POWERON) - no trigger, but Eval board makes a liar of me and doesn't boot.

Repeat above sequence: still no boot.

Remove scope probe, repeat sequence - boots. Put scope back on, no boot - etc. Clearly scope probe on POWERON pin is enough to prevent this phenomenon. So it's probably an EMI- induced pulse on POWERON.

So, back to finding back-bias culprits. I'll try holding off the Baseboard's 3.3V longer than 20ms.

Cheers!
MADman