This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS659037 processing of eratta of AM5728

Other Parts Discussed in Thread: AM5728, TPS659037

Hi,

It is a question of following eratta of AM5728.
i862:Reset Should Use PORz

There are following mentions by "Implementation 1" of this eratta.

The side effects/risks of this implementation include:
This implementation does not allow software to shut the PMIC outputs that which falls
Power the SoC. 
Only the PMIC RESET_IN can shut the PMIC outputs while which falls
POWERHOLD is pulled high.

Does these "Implementation 1" support only RESET_IN in the list of Table 5-10 OFF Requests of the data sheet of TPS659037 ?
www.tij.co.jp/.../tps659037.pdf


In Table 14 Shutdown_ColdReset OTP Settings of the following documents, the value of RESET_in is cold reset
www.tij.co.jp/.../sliu011d.pdf

Can SW_RST of DEV_CTRL Register and the PWRDOWN pin input of TPS659037 shut down the system?

Best Regards,
Shigehiro Tsuda

  • Hello Tsuda-san,

    For "implementation 1", it recommends connecting processor rstoutn with PMIC NRESWARM. Although NRESWARM does not shut off the PMIC, it does toggle RESET_OUT/PORz signal when BOOT1=1. So in this configuration, it satisfies the processor requirement that PORz be toggled during all reset cases.

    > Does these "Implementation 1" support only RESET_IN in the list of Table 5-10 OFF Requests of the data sheet of TPS659037 ?
    All OFF requests are supported in this case. I think this statement was referring to the way the AM572x EVM is configured.

    > Can SW_RST of DEV_CTRL Register and the PWRDOWN pin input of TPS659037 shut down the system?
    DEV_CTRL.SW_RST can restart the system, which means it will shut down and immediately start up again. This will also toggle PORz, and therefore is a reliable reset.

    Regards,
    Karl
  • Hi Karl,

    Thank you for quick reply.

    AM572x EVM seems to use  "Implementation 2".

    AM572x eratta description

    -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    This implementation does not allow software to shut down the PMIC outputs that power the SoC. Only the PMIC RESET_IN can shut down the PMIC outputs while POWERHOLD is pulled high.

    ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    Because the control of software of shutdown was not to admit it, it is asked this question.
    Depending on terms of use of TPS659037, will these contents change?

    Best Regards,

    Shigehiro Tsuda

  • Hello Tsuda-san,

    You are right about the EVM implementation. I recall why that statement was added. Normally, DEV_ON bit can be cleared to "0" to turn the PMIC off. However, when using this workaround, warm reset will not work correctly, and will instead turn the PMIC off if DEV_ON is used to keep the PMIC on. We have this statement in section 7 of our user's guide:

    If BOOT1 = 1 is used, then the PMIC must be enabled by the POWERHOLD (GPIO_7) pin. If the PMIC
    will be enabled by the PWRON pin and kept on using the DEV_ON bit, then BOOT1 = 0 must be used. If
    POWERHOLD is set to GND while BOOT1 = 1, the PMIC will shut off during the warm reset sequence.

    This means that when using workaround implementation #1, DEV_ON should not be used to keep the PMIC on, and instead POWERHOLD should be used. Then RESET_IN is recommended as a hardware controlled method to turn off the PMIC. However, all the other methods are still available to turn off the PMIC. SW_RST will work, but the difference is it will immediately restart the PMIC.

    Regards,
    Karl
  • Hi Karl,

    Thank you for quick reply.

    I understood it as follows.

    It is necessary to use POWERHOLD pin if BOOT1=1 is used.
    To shut down system, the POWERHOLD must be set to GND while BOOT1 = 1.
    PMIC off using DEV_ON bit must use BOOT1=0.
    PMIC is recommended hardware control of RESET_IN, but can use even other methods.

    Thank you to the kind support.

    Best Regards,
    Shigehiro Tsuda

  • Hi Tsuda-san,

    > It is necessary to use POWERHOLD pin if BOOT1=1 is used.
    Correct

    > To shut down system, the POWERHOLD must be set to GND while BOOT1 = 1.
    Not necessarily, other OFF requests still work. POWERHOLD can turn the PMIC off, but so can RESET_IN and PWRDOWN.

    > PMIC off using DEV_ON bit must use BOOT1=0.
    Correct

    > PMIC is recommended hardware control of RESET_IN, but can use even other methods.
    Correct, for power-down control.

    Regards,
    Karl
  • Hi Karl,

    Thank you for quick reply.

    >Not necessarily, other OFF requests still work. POWERHOLD can turn the PMIC off, but so can RESET_IN and PWRDOWN.

    Three following off request supports shutdown when I refer to Table 14 Shutdown_ColdReset OTP Settings of the following document.
    It is like cold reset other than it.
    www.tij.co.jp/.../sliu011d.pdf
    1.PWRON_LPK
    2.TSHUT
    3.VSYS_LO

    Should shutdown from RESET_IN and PWRDOWN pin change the following registers to shutdown by software from cold reset?

    102 Table SWOFF_COLDRST Register

    Thank you to the kind support.

    Best Regards,
    Shigehiro Tsuda

  • Hello Tsuda-san,

    Technically you are right that RESET_IN and PWRDOWN are configured as cold reset. However, since they are both ON request gating conditions, holding RESET_IN low will keep the device off until RESET_IN is released high. So functionally it acts like a power-off request, since it has the function low=OFF and high=ON. Same with PWRDOWN, although it has reverse polarity so low=ON and high=OFF.

    Regards,
    Karl
  • Hi Karl,

    Thank you for quick reply.
    I understood it as follows.
    Is it right?
    Even if RESET_IN and POWERDOWN make setting of cold reset, because they work like power off, I do not need the software control, and they do not have any problem as the cold reset setting either.

    Best Regards,
    Shigehiro Tsuda

  • Hi Tsuda-san,

    Yes, that is correct.

    Regards,
    Karl
  • Hi Karl,

    Thank you for quick reply.

    I understood each signal.

    Thank you to the kind support.

    Best Regards,
    Shigehiro Tsuda