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TPS65218 - Unused Load Switch could be left floating ?

Other Parts Discussed in Thread: TPS65218, AM3357, AM3352

Hello,

I'm currently trying to design a custom board using AM437x and TPS65218 PMIC. Speaking of TPS65218, I don't need to use LS2. My question is :

Can I leave any load switch I don't use floating ? I'm talking about both LS and IN_LS pins ?

Thanks for any feedback I get.

  • Hi RWIN,

    Thanks for the post! If LS2 is not being used, IN_LS2 (input) should be grounded while LS2 (output) is left floating. This also applies to LS1 and LS3, if these are not being used in your system. Let me know if there are any questions. Thanks again for the post!

    Regards,

    Paul Kundmueller

  • Thanks for the quick answer Paul ! This piece of information is really useful as I didn't find anything about it in the TPS65218 datasheet.
    Thanks again !
  • Hello Paul,

    are you sure?
    The Datasheet shows under recommended conditions, that you have to tied the IN_LS1-3 to different Voltages.
    In my design i had exactly the problem, that 60% of the AM3357 did not start as i tied them to Ground.
    After connecting them to the needed Voltage, all Boards worked perfectly.
    Btw. Designs with the AM3352 also work with tied to Ground, why ever.

    Regards, Kai 

  • Hi Paul, I have another question about this PMIC.
    What is the output voltage level of its IOs ?
    Because I don't know which voltage I can use for the different pull-ups...

    Thanks for any answer !
  • Hi RWIN,

    Many times customers pull their I/O's up to either 1.8V (LDO1) or 3.3V (DCDC4) for TPS65218.

    Hi Kai,

    Thanks for the post. These are valid configurations for TPS65218. The internal sequencer of TPS65218 is not gated by the startup of LS1, LS2, or LS3. Since these LSx are not gated by the internal sequencer, they can be grounded without any consequences to the functionality of the PMIC.
    If you could provide more details I might be able to help you pinpoint why this wasn't working for a given processor version. What voltages did you pull these up to in the configuration where these worked? The pins you are referring to are Load Switch 1(IN_LS1), Load Switch 2 (IN_LS2), and Load Switch 3 (IN_LS3), correct?

    Regards,

    Paul Kundmueller
  • Hi Paul,
    i had debuged the problem and here is the explanaition to the fault.
    If i pull the Pins IN_LS1 and IN_LS3 (which are not used) to GND, i´ll get an Interrupt from the PMIC.
    Unfortunately is this Pin connected to the EMU0 Pin of the AM3357.
    So the Bootup sequence of the Processor will not work correct.
    The Interrupt is only at 60% of my PCBs the other 40% are working correctly.
    If i tied the IN_LS1 and IN_LS3 to 3.3V there is no Interrupt on any PCB.
    At the Datasheet i read:

    6.3 Recommended Operating Conditions

    over operating free-air temperature range (unless otherwise noted)

    MINNOMMAXUNIT
    Supply voltage, IN_BIAS 2.7 5.5 V
    Input voltage range for DCDC1, DCDC2, DCDC3, DCDC4 2.7 5.5 V
    Supply voltage, IN_BU 2.2 5.5 V
    Supply voltage, CC 2.2 3.3 V
    Input voltage range for LDO1 1.8 5.5 V
    Input voltage range for LS1 1.2 3.3 V
    Input voltage range for LS2 3.0 5.5 V
    Input voltage range for LS3 1.8 9.9 V
    Output voltage range for DCDC1, DCDC2, DCDC3, DCDC4 0.85 3.5 V
    Output voltage range for DCDC5 1.0 1.1 V
    Output voltage range for DCDC6 1.8 1.8 V
    Output voltage range for LDO1 0.9 3.4 V
    Output current DCDC1, DCDC2, DCDC3 0 1.8 A
    Output current DCDC4 0 1.0 A
    Output current DCDC5, DCDC6 0 10 mA
    Output current LDO1 0 400 mA
    Output current LS1 0 300 mA
    Output current LS2 0 1000 mA
    Output current LS3 0 1000 mA

    So in my opinion, i have to tied them to the recommended Voltage.
    Otherwise, why will the PMIC generate an Interrupt on 60% of the PCBs if the IN_LS1 & IN_LS3 are not used and tied to Ground?

    Regards,

    Kai

  • Hi Kai,
    If you tied the IN_LSx pins to 3.3V to solve your problem, did you leave the LSx pins floating or did you connect them to some external capacitors ?

    Paul, I got two more questions for you : if I don't want to use the LDO1 voltage, what should I do with that pin and the IN_LDO pin ? Should I tie them to ground or leave them floating ? Or should I connect them to some voltage source or external capacitor ?

    And what happens if I don't use L5 and L6 supplies ? Can I leave the IN_BU pin floating ?

    I'm looking forward for your answer.

    RWIN

  • Hi Kai,
    If you tied the IN_LSx pins to 3.3V to solve your problem, did you leave the LSx pins floating or did you connect them to some external capacitors ?

    Paul, I got two more questions for you : if I don't want to use the LDO1 voltage, what should I do with that pin and the IN_LDO pin ? Should I tie them to ground or leave them floating ? Or should I connect them to some voltage source or external capacitor ?

    And what happens if I don't use L5 and L6 supplies ? Can I leave the IN_BU pin floating ?

    I'm looking forward for your answer.

    RWIN
  • Hi Kai/RWIN,

    Sorry for the late response. The IN_LSx pins should be tied to GND if they are not used and the LSx pins should be left floating. The behavior Kai described is strange. I tried this on an EVM that I have and I saw no interrupts being issued when LSx are disabled in reg 0x12h. I did notice and expect an interrupt to be issued when I had LSx enabled in reg 0x12h while the IN_LSx pins were gnd'ed and the output was left floating.

    Hi Kai,

    One of the things you may need to do to find the root cause of your AM3357 startup issue, is to look through the startup code of the AM3357 to see if the LSx are being enabled in reg 0x12h somewhere in the code. I know this may be a cumbersome task so I will ping my counterparts in AM335x to understand if any of the LSx are being enabled in the startup code for AM3357.

    Hi RWIN,

    In terms of your LDO1 questions, IN_LDO1 should be tied to IN_BIAS. Will you be using STRICT=0 or STRICT=1 in reg 0x13h?  The output (LDO1) should be tied to a voltage higher than 1.8V (MAX 3.4V) if the STRICT=0 setting is used. This voltage must also be higher than 1.8V before LDO1 is enabled in the power-up sequence (refer to pages 19-20 in the datasheet for power up sequencing information). If the STRICT=1 setting is used then LDO1 needs to be tied to a 1.8V signal with a +/-4% tolerance. This voltage must be within +/-4% of 1.8V before LDO1 is enabled in the power-up sequence (refer to pages 19-20 in the datasheet for power up sequencing information).

    Alternatively, you could just have LDO1 connected to an output capacitor and leave it unconnected from the rest of your circuitry. This would cost you just an input and output capacitor on IN_LDO1 and LDO1, respectively.

    If DCDC5 and DCDC6 are not being used, please refer to Figure 21 on Page 31 of the datasheet for connections of the critical signals for DCDC5/6.

    Regards,

    Paul Kundmueller

  • Hi Paul,

    Thanks once again for your feedback.

    I think I'm going to use the STRICT=0 setting as it seems to be the default one (the RESET column shows a '0h' value)
    Actually, I think I'm going to use the TPS65218 default configuration everytime.

    Could you please confirm that the PMIC works straight out of the box with a default configuration that is made with the reset values of each bit from each register ?
  • Hi Paul,
    that is the problem, we use the TPS65218 with the default Value at startup. So it is not possible to disable or enable the register 0x12h.
    Unfortunately, the interrupt is generatetd before the AM3357 is coming up and the interrupt Pin is tied to EMU0, owing because i´m not able to use another one.
    The strange behavior is, that just 60% of my PCBs have this issue. And other PCBs with "nearly" the same function and Layout, but with an AM3352 are working perfect (no Interrupt at 0x12h).
    I think that this could have something to do with the AM3357 together with the TPS65218. The Power up sequence of the TPS65218 on bad and good PCBs are looking good, but maybe there is Voltage feedback or something like that, what causes the interrupt?
    I could measure some parts if you would like, but i´m not sure where to search this issue any more.

    Btw. Paul, are you at the electronica in Munic in November?

    Best regards Kai

  • Hi RWIN,

    Sorry for the delay. The PMIC does work straight out of the box with the default configuration for both AM335x and AM437x.

    Hi Kai,

    I am a little confused by your latest post. So for 60% of your PCBs, which are all AM3357, they do not work and the remaining 40%, which are all AM3352, do work? Is that correct? For your startup code, have you modified the kernel code to write to the PMIC? If you power on just the TPS65218 without U-boot, do you see the interrupt being generated? It seems that something is being written to the PMIC to enable LS2 which is causing the interrupt to be generated.

    In terms of Electronica, I will not be able to attend this year but a colleague of mine will be there to represent our PMIC group.

    Let me know if there are any questions. Thanks!

    Regards,

    Paul Kundmueller

  • Hi Paul, sorry for the confusion. :-)
    No all of my PCBs are with the AM3357 and 60% of them are not working, if i tied IN_LS1 to GND. The other 40% are working without an interrupt.
    My College (sit beside me) has "nearly" the same design with an AM3352 and all of the PCBs are working. Of course is his design for an other solution.

    So we are using the default configuration. No code is written to the PMIC.
    As i told you, the interrupt is generated before the cpu has started. Unfortunately is this Pin connected to the EMU0 and the CPU is going to "WIR mode" after the reset is released.
    But only at 60% of the PCBs. The distance of the PCB between PMIC and CPU are about 20mm.
    Maybe it is possible to meet somebody from the PMIC group on Thursday? We will meet Mr. Naumann and Mr. Jansen at the electronica.

    Thanks Kai

  • Hi Kai,

    That's interesting. Do you know which interrupt is being generated? Is it LS1_F or LS1_I in register 0x2h? Also when you see the issue, is the output of LS1 left unconnected or is it grounded? For the AM3352 design, is nINT pin connected to the EMU0 pin as well? If possible, would you be able to share your schematics? If yes, I will initiate a friendship request with you so you can privately share your schematics with me. Let me know if you have any questions. Thanks!

    Regards,

    Paul Kundmueller

  • Hi Kai,

    Sorry I also forgot to add, Mr. Naumann contacted me this morning on this issue and I have put him in touch with my colleague that will be at Electronica. I will confirm with my colleague that he can connect with you on Thursday with Mr. Naumann.

    Regards,

    Paul Kundmueller
  • Hello Paul,
    okay, maybe it is nessary to share parts of my shematic with TI. I will discuss this on Thursday.
    It is LS1_I and just for a short explanation.
    To measure this, we disconnected the EMU0 Pin from the PMIC and tied the EMU0 Pin to Power.
    The CPU is now able to startup. Of cause is the interrupt generated by the PMIC, but with this fault diagnostic our software is working on the CPU and we are able to localize the issue.

    regards,

    Kai