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TPS65910: TPS65910 start-up issue.

Part Number: TPS65910
Other Parts Discussed in Thread: , TPS65951

Hi,

We have TPS65910A31 start-up (VRTC related) issue with one more customer.
The TPS65910x is used as a PMIC for AM335x.
Similar to the below posts, few boards are working after reducing the load
on VRTC LDO by changing capacitor value on VRTC pin to 0.1uF.
e2e.ti.com/.../1843272

e2e.ti.com/.../2026890

Out of 30 custom boards 5 are not working even with 0.1uF on VRTC.
During power up the VRTC voltage is very low at 0.8V.
VRTC is connected to VDDS_RTC and RTC_KALDO_ENn as per the reference
document (TPS65910Ax User's Guide for AM335x).

With so many issues related to VRTC start-up, we believe this LDO
should not be used in any use case, even if the load is smaller or not.
Please do let us know if this is a kind of errata in TPS65910A31?

Meanwhile with one of our customer, we have asked them to remove all the
loads from VRTC and connect VDDS_RTC to available LDO like VDAC as shown below.

Could please let us know if this is the proper way to reduce load on VRTC?
And if there is any other recommended design to reduce load on VRTC..




It will be very helpful if you change the reference diagram in the user
guide(SWCU093E) which will show that VRTC should not be used in any application.

Best Regards
Kummi

  • Hi Kummi,

    If you tie RTC_KALDO_ENn to VDDS_RTC you are disabling the internal RTC LDO on the AM335x. If so, you should have CAP_VDD_RTC tied to an external 1.1V power supply.  Can you confirm this is the case? Otherwise, if RTC_KALDO_ENn is tied low then the internal RTC LDO will supply the necessary source. Also, as  you are aware the recommended minimum output capacitor is .8uF so we can't guarantee the performance of VRTC LDO with a .1uF capacitor.

    -Raymundo Hernandez-Toscano

  • Hi Raymundo,

    Thank you for the reply.
    Yes the internal RTC LDO is not used and the CAP_VDD_RTC tied to VDD_CORE(1.1V).

    With Regards to your comment...
    Also, as you are aware the recommended minimum output capacitor is .8uF so we can't
    guarantee the performance of VRTC LDO with a .1uF capacitor.

    Yes we are aware about the capacitor limit(.8uF) but as mentioned
    this PMIC won't work with large capacitors, works only with 0.1uF.
    This is definetly an issue with the PMIC's VRTC LDO.

    I have posted many issues on VRTC start up, but not able to get the proper answer.

    Could please let us know if this is the proper way to reduce load on VRTC?
    And if there is any other recommended design to reduce load on VRTC..
    As I mentioned The above "Figure 2" connection (VRTC to VDDS_RTC) is not
    working in many cases.

    Our customer wants to know if connecting VDDS_RTC to available LDO like VDAC
    is a guaranteed connection from TI or else what is the recommended connection?

    Best Regards
    Kummi
  • Hi Kummi,

    Is there a reason that the customer boards have the RTC LDO on the AM335x disabled? Can you confirm that when VRTC is tied to VDDS_RTC only no other external loads, RTC_KALDO_ENn is pulled/tied low, that the boards still don't work? Also, can provide scopeshots of VDDS_RTC, CAP_VDD_RTC, and VREF? Connecting VDDS_RTC to VDAC is not the recommended connection as per SWCU093E. If possible, would you mind sharing a schematic of the board over a private message or email.

    -Raymundo Hernandez-Toscano

  • Hi Raymundo,

    Thank you.

    >Is there a reason that the customer boards have the RTC LDO on the AM335x disabled?
    ->
    This is as per the recommended schematics, as per the AM335x Schematics checklist
    if RTC is not necessary we need to make the connections described in "RTC feature disabled" section.
    processors.wiki.ti.com/.../AM335x_Schematic_Checklist

    This application is not using RTC feature, hence the feature disabled.

    >Can you confirm that when VRTC is tied to VDDS_RTC only no other external loads,
    >RTC_KALDO_ENn is pulled/tied low, that the boards still don't work?
    ->
    VRTC is tied VDDS_RTC, RTC_KALDO_ENn pins.
    And also Boot1 pin of TPS65910 same as the AM335x EVM.

    With a different customer we have seen below behavior.

    1> Few Boards work if we change the VRTC capacitor value from 2.2uF to 0.1uF
    2> Few Boards work only if we remove the VRTC capacitor

    We have around four customers, with many boards which have issue in TPSxx start-up
    and in most of the case it is with the VRTC, VRTC output below 0.8V.

    >Also, can provide scopeshots of VDDS_RTC, CAP_VDD_RTC, and VREF?
    ->
    I will check if we can get the scopeshots from the customer.
    But you can find more details in my previous posts below.

    e2e.ti.com/.../501127

    e2e.ti.com/.../554074

    We have already cross-checked the schematics in below E2E.
    e2e.ti.com/.../1774426

    >Connecting VDDS_RTC to VDAC is not the recommended connection as per SWCU093E.
    ->
    I have cross-checked this connection with Richard through below E2E and got the
    comment saying.."This is fine from the PMIC perspective"
    e2e.ti.com/.../501127

    Actually two of our customers are using this workaround already.

    With respect to changing capacitor value on VRTC pin to 0.1uF,
    we have comment from TI below saying 7 out of 25 boards were not working
    which they solved by changing to 0.1uF.

    e2e.ti.com/.../1814908
    One of my customer was facing similar issue of startup. They have made 25 boards & out of
    25, 18 boards were working & rest of the 7 boards were not working.
    After lots of debugging I found that if we change capacitor value on VRTC pin to 0.1uF
    all the boards were working perfectly fine.

    If this issue was with only one customer or one application I would agree
    that they may be something wrong in the schematics,
    but we are seeing this issue with many customers with many applications
    which are designed as per the manuals and EVM schematics.

    Best Regards
    Kummi

  • Hi Kummi,

    I am still working on providing you with answers to your questions. I will reply to this post as soon as possible.

    -Raymundo Hernandez-Toscano
  • Hi Kummi,

    Richard is correct, you can connect VDDS_RTC to VDAC LDO. However, keep in mind that VRTC on the TPS65910A31 can supply full load to VDDS_RTC and remain on when the PMIC is in a off state, VDAC does not. If you do not need the VRTC functionality ( always on option) then I don't see an issue with this. There are many parameters that can affect the performance of VRTC outside scope of the capacitance. Also, can you confirm that you in fact have the TPS65910A31 spin of the TPS65910xx and not the TPS65910A or TPS65910A3? If the PMIC is entering a low power mode (.1mA max load from VRTC) then this would not suffice for the AM335x RTC domain.

    -Raymundo Hernandez-Toscano

  • Hi Raymundo,

    Thank you.

    The device used is TPS65910A3A1.
    As I mentioned we are not using any low power modes. AM335x is always ON.
    And we are not using any RTC. This problem occurs only during the power up.

    I can understand VRTC MAX load should be less than 0.1mA during low power mode
    but this application is not using low power mode, so I don't understand where
    does the 0.1mA limit comes into picture.

    Best Regards
    Kummi

  • Hi Kummi,

    I know we have taken this offline, but to provide a response to your question. As I previously stated the reason for my concern here is when the TPS65910A3A1 enters a low power the VRTC LDO cannot source more than .1mA. This would account for a failure to regulate during these cases. I did not spot any issues with the actual schematic connections. As I previously stated when setting the VRTC_REG bit VRTC_OFFMARK then this will ensure that when the device is in a low power mode that VRTC LDO will be in full-power mode, prior to sequencing but when power is asserted then you are off-state, as per the state machine. However, the VRTC_REG bit is set in EEPROM and by default it is set to full power mode for the TPS65910A31A1. In the TPS65910A3A1 your device, it is not set and hence you would not be in able to source more than .1mA in an off sate/ low power mode.

    -Raymundo Hernandez-Toscano
  • Hi Raymundo,

    I am sorry to bother you again.
    We still couldn't close this issue.

    Actually, our customer is still having this issue on their new boards.
    As it was difficult to modify the board, they are continuing to produce
    new boards by changing the VRTC LDO capacitance value.

    Most of the boards are working well but few boards have start-up problem.
    Bad boards sometimes work and sometimes not.
    i.e When working VRTC LDO output is 1.8V and 0V when not working.

    Could you please let us know what is the reason that VRTC LDO may enter
    low power during Power-up?. As per the datasheet, VRTC LDO can output MIN 20mA,
    but the pins tied to VRTC consumes very less power (<20mA).
    We are still confused why would TPS65910 enter low power mode during power up?

    Please let us know if there is any way to find out the sequence of TPS65910A3A1
    going into the low power mode.

    Best Regards
    Kummi

  • Hi Kummi,

    I am the new owner of this device going forward and am reviewing the history of this issue now.

    My understanding is that for the TPS65910A3A1 OTP, the VRTC LDO of the TPS65910 is in low power mode from when the device receives sufficient voltage to turn it on until the OFF2ACT sequence is complete. After OFF2ACT sequence, it is in full power mode and remains in full power mode until  For the TPS65910A31A1, it is always in full power mode.

    After reading through the other posts, it seems that there have been issues even with the TPS65910A31A1, is that correct?

    Finally, I wasn't able to find whether switching PMICs was ever tried? Meaning taking a good board and a bad board and switching the PMIC to see if the issue stays with the board or with the PMIC. If the issue follows the PMIC, then I may request to have one of these bad units sent back to Dallas so I can pursue further testing.

    In the meantime, I will pursue some VRTC LDO testing here to see if I can replicate on any of my EVMs.

  • Hello, Kevin,

    Thank you for considering this issue.

    Currently, this application uses TPS65910A3A1 but we had similar
    problem with TPS65910A31A1 used in a different application.

    We checked about switching PMIC, unfortunately, the customer board PCB is
    very small, it seems it is not possible to replace the PMIC.

    Plese let us know if there is anything other tests to check if
    there is any problem with the PMIC.

    Best Regards
    kummi
  • Hi Kummi,

    It appears that if current load on the VRTC LDO is greater than approximately 1 mA (resistance between 1500 ohm and 2000 ohm), then the VRTC does not reach 1.8V and as a result, the device is stuck in "No Supply" state. In "No Supply" state the OTP is not loaded yet so the VRT_OFFMASK bit is sitting in reset mode, which happens to be 0b, meaning low power mode. 

    If the external load is removed, the PMIC is able to boot, at which point it can load the OTP and support up to 20 mA.

    As such, I can see why the issue may have been seen on both A3 and A1 OTP since it seems to be an issue prior to OTP load.

    Next step from my side is to try to identify if there are special steps that need to be taken that may not have been sufficiently documented to ensure that the processor does not draw more than 100 uA until PMIC is out of NO SUPPLY state.

    One more note was that I did not see any dependence during my testing on the capacitance. i tested as high as 22 uF and while the rise time of the VRTC was delayed, I did not see any issue. Perhaps there is a timing condition where the processor takes some time to put a load on VRTC and the additional capacitance prevents the VRTC from reaching 1.8V before the processor starts drawing load.

  • Hi Kevin,

    Thank you for the tests and the information.
    We appreciate your effort to solve this issue.

    You are right that this limitation should be documented especially in the
    user guide ((TPS65910Ax User's Guide for AM335x).
    We have many customers's who had the start-up issue with TPS65910,
    it would be very helpful if there is a description in the user guides.

    We also believe there some dependency on VRTC capacitance.
    As our current customer solved the issue with other boards by changing the
    capacitance to 0.1uF.

    Below E2E post also has the same comment from a different customer.  
    e2e.ti.com/.../320847

    "After lots of debugging I found that if we change capacitor value on VRTC pin to
     0.1uF all the boards were working perfectly fine."

    Meanwhile if possible could you please let us know if TPS65910 start-up has
    any dependency on the Temperature. Our customer has mentioned that TPS65910 starts
    normally when the temperature is high(>30 deg).

    Best Regards
    Kummi

  • Hi Kummi,

    I was reviewing the AM335x Starter Kit and wanted to see how the customer is using VRTC. I see in the Starter Kit that the non-PMIC VRTC is used for several pull-ups (WOL_INT1, WOL_INT2, PMIC_GPIO. and PMIC_GPIO_RTC) and to power a couple of digital gates (U19A and U19B). These pull-up resistors are all 10k, so if any of them are active, they would draw roughly 180 uA which would prevent boot. I'm concerned a race condition may exist where the rise time of the VRTC rail determines whether or not the OTP is able to load before the external loads begin drawing too much current and VRTC either collapses or just never reaches 1.8V. That would explain why reducing the capacitance can result in boards that are able to power up.

    If these pull-ups are present, a useful test would be to increase the pull-up resistance to 100k or 1M to see if the board will boot. Additionally, removing any of the ICs attached to VRTC and implementing their functionality in a different way, or delaying their access to VRTC.
  • HI Kummi,

    Not sure if that relates with you, but I've seen issues with the TPS65951 where it doesn't start if the 32KHz (related to VRTC) is not coming up. 

    best regards

    Stig