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TPS650830: V13(VTT) power fault

Part Number: TPS650830

Hi,

My customer has a issue about V13(VTT) power fault.


Q1: Why is the default value of V13_FLTmsK the "1"?
The others default is "0".

Q2: After setting V13_FLTmsK = "0", Can we become to disable(DDR_VTT_CTRL=0) LDO1 without V06DX_FAULT?


Best regards,
Shimizu

  • Shimizu-san,

    This post has been assigned to the expert for the TPS650830 device and he will reply to your post as soon as possible to help resolve your question.
  • Shimizu san,

    In TPS650830, Enable for VTT is internal gated with All system power good. Can you please confirm if the All system power good is high, i.e All PMIC and system power rails should be high.

    Once, All_sys_power_good is high, VTT can be enabled or disabled using DDR_VTT_CTRL pin.

    Regards,

    Jay

     

  • Hi Jay,

    Thank you for your support.

    My customer tried "Once, All_SYS_PWERGD is high, VTT can be enabled or disabled using DDR_VTT_CTRL pin.".
    But this issue occurred.

    Do you have any idea of the reason?
    Customer confirmed customer system board and EVM.
    Each board occur this issue.

    Best regards,
    Shimizu
  • Shumizu san,

    Can you please let me know the status of VR4(VDDQ) rail when this fault happens. Also it would be helpful if you have a scope shot of the VTT rail. Does it start and then shutdown after some delay or it never turns on?

    Also, please confirm what is  status of SLP_SUS#, SLP_S3,SLP_S4 and SLP_S0 and VCCST_PWRGD signal.

    Regards,

    Jay

  • Hi Jay,

    Thank you for your support.
    I confirmed customer your question.
    Please see below.

    Q1:the status of VR4(VDDQ) rail when this fault happens.
    -> VR4(VDDQ) rail is high (normaly status).

    Q2:a scope shot of the VTT rail
    ->Please see the blow picture.


    Q3:Does it start and then shutdown after some delay or it never turns on?
    ->It never turns on.

    Q4:please confirm what is status of SLP_SUS#, SLP_S3,SLP_S4 and SLP_S0 and VCCST_PWRGD signal.
    ->Please see the blow picture.


    Best regards,
    Shimizu

  • Shimizu san,

    in the plots above, I see that multiple pulses of VTT_CTR signal for only few <200us. Can you confirm if this is expected. I see fault happeing only after 3rd pulse. what is the value of status registers 0x16 and 0x17 after the fault.

    Regards,
    Jay
  • Hi Jay,

    Thank you for your reply.
    I answer below.

    >I see that multiple pulses of VTT_CTR signal for only few <200us.
    ->VTT_CTR signal is controlled by OS.
     Must we operate VTT_CTR signal to under 200us?

    >I see fault happening only after 3rd pulse.
    ->The pulse of VTT_CTR is generated many times.
       The fault happening not only after 3rd pulse.

    >what is the value of status registers 0x16 and 0x17 after the fault.
    ->0x16=01h
       0x17=00h

    Best regards,
    Shimizu

  • Shimizu,

    As VTT rail is switching on and off fast, this would cause the feedback node noise and create a fault. Our recommendation is to always mask VTT_FLT_Mask=1.

    Thanks,
    Jay